1 What: /sys/kernel/debug/moxtet/input 1 What: /sys/kernel/debug/moxtet/input 2 Date: March 2019 2 Date: March 2019 3 KernelVersion: 5.3 3 KernelVersion: 5.3 4 Contact: Marek Behún <kabel@kernel.org> 4 Contact: Marek Behún <kabel@kernel.org> 5 Description: (Read) Read input from the shi 5 Description: (Read) Read input from the shift registers, in hexadecimal. 6 Returns N+1 bytes, where N is 6 Returns N+1 bytes, where N is the number of Moxtet connected 7 modules. The first byte is fro 7 modules. The first byte is from the CPU board itself. 8 8 9 Example:: 9 Example:: 10 10 11 101214 11 101214 12 12 13 == ========================== 13 == ======================================= 14 10 CPU board with SD card 14 10 CPU board with SD card 15 12 2 = PCIe module, 1 = IRQ n 15 12 2 = PCIe module, 1 = IRQ not active 16 14 4 = Peridot module, 1 = IR 16 14 4 = Peridot module, 1 = IRQ not active 17 == ========================== 17 == ======================================= 18 18 19 What: /sys/kernel/debug/moxtet/outpu 19 What: /sys/kernel/debug/moxtet/output 20 Date: March 2019 20 Date: March 2019 21 KernelVersion: 5.3 21 KernelVersion: 5.3 22 Contact: Marek Behún <kabel@kernel.org> 22 Contact: Marek Behún <kabel@kernel.org> 23 Description: (RW) Read last written value t 23 Description: (RW) Read last written value to the shift registers, in 24 hexadecimal, or write values t 24 hexadecimal, or write values to the shift registers, also 25 in hexadecimal. 25 in hexadecimal. 26 26 27 Example:: 27 Example:: 28 28 29 0102 29 0102 30 30 31 == ========================== 31 == ================================================ 32 01 01 was last written, or is 32 01 01 was last written, or is to be written, to the 33 first module's shift regis 33 first module's shift register 34 02 the same for second module 34 02 the same for second module 35 == ========================== 35 == ================================================
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