1 What: /sys/class/iommu/<iommu>/intel
2 Date: June 2014
3 KernelVersion: 3.17
4 Contact: Alex Williamson <alex.williamso
5 Description:
6 Physical address of the VT-d D
7 Format: %llx. This allows ass
8 intel-iommu with a DMAR DRHD t
9
10 What: /sys/class/iommu/<iommu>/intel
11 Date: June 2014
12 KernelVersion: 3.17
13 Contact: Alex Williamson <alex.williamso
14 Description:
15 The cached hardware capability
16 of this DRHD unit. Format: %l
17
18 What: /sys/class/iommu/<iommu>/intel
19 Date: June 2014
20 KernelVersion: 3.17
21 Contact: Alex Williamson <alex.williamso
22 Description:
23 The cached hardware extended c
24 value of this DRHD unit. Form
25
26 What: /sys/class/iommu/<iommu>/intel
27 Date: June 2014
28 KernelVersion: 3.17
29 Contact: Alex Williamson <alex.williamso
30 Description:
31 The architecture version as re
32 VT-d VER_REG. Format: %d:%d,
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