1 What: /sys/bus/.../drivers/intel-m10 !! 1 What: /sys/bus/spi/devices/.../bmc_version
2 Date: June 2020 2 Date: June 2020
3 KernelVersion: 5.10 3 KernelVersion: 5.10
4 Contact: Xu Yilun <yilun.xu@intel.com> 4 Contact: Xu Yilun <yilun.xu@intel.com>
5 Description: Read only. Returns the hardwar 5 Description: Read only. Returns the hardware build version of Intel
6 MAX10 BMC chip. 6 MAX10 BMC chip.
7 Format: "0x%x". 7 Format: "0x%x".
8 8
9 What: /sys/bus/.../drivers/intel-m10 !! 9 What: /sys/bus/spi/devices/.../bmcfw_version
10 Date: June 2020 10 Date: June 2020
11 KernelVersion: 5.10 11 KernelVersion: 5.10
12 Contact: Xu Yilun <yilun.xu@intel.com> 12 Contact: Xu Yilun <yilun.xu@intel.com>
13 Description: Read only. Returns the firmwar 13 Description: Read only. Returns the firmware version of Intel MAX10
14 BMC chip. 14 BMC chip.
15 Format: "0x%x". 15 Format: "0x%x".
16 <<
17 What: /sys/bus/.../drivers/intel-m10 <<
18 Date: January 2021 <<
19 KernelVersion: 5.12 <<
20 Contact: Peter Colberg <peter.colberg@in <<
21 Description: Read only. Returns the first M <<
22 of sequential MAC addresses as <<
23 that is managed by the Intel M <<
24 FLASH storage and is mirrored <<
25 space. <<
26 Format: "%02x:%02x:%02x:%02x:% <<
27 <<
28 What: /sys/bus/.../drivers/intel-m10 <<
29 Date: January 2021 <<
30 KernelVersion: 5.12 <<
31 Contact: Peter Colberg <peter.colberg@in <<
32 Description: Read only. Returns the number <<
33 addresses assigned to the boar <<
34 MAX10 BMC. This value is store <<
35 in the MAX10 BMC register spac <<
36 Format: "%u". <<
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