1 What: /sys/devices/platform/hidma-mg 1 What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
2 /sys/devices/platform/QCOM8060 2 /sys/devices/platform/QCOM8060:*/chanops/chan*/priority
3 Date: Nov 2015 3 Date: Nov 2015
4 KernelVersion: 4.4 4 KernelVersion: 4.4
5 Contact: "Sinan Kaya <okaya@kernel.org>" 5 Contact: "Sinan Kaya <okaya@kernel.org>"
6 Description: 6 Description:
7 Contains either 0 or 1 and ind 7 Contains either 0 or 1 and indicates if the DMA channel is a
8 low priority (0) or high prior 8 low priority (0) or high priority (1) channel.
9 9
10 What: /sys/devices/platform/hidma-mg 10 What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/weight
11 /sys/devices/platform/QCOM8060 11 /sys/devices/platform/QCOM8060:*/chanops/chan*/weight
12 Date: Nov 2015 12 Date: Nov 2015
13 KernelVersion: 4.4 13 KernelVersion: 4.4
14 Contact: "Sinan Kaya <okaya@kernel.org>" 14 Contact: "Sinan Kaya <okaya@kernel.org>"
15 Description: 15 Description:
16 Contains 0..15 and indicates t 16 Contains 0..15 and indicates the weight of the channel among
17 equal priority channels during 17 equal priority channels during round robin scheduling.
18 18
19 What: /sys/devices/platform/hidma-mg 19 What: /sys/devices/platform/hidma-mgmt*/chreset_timeout_cycles
20 /sys/devices/platform/QCOM8060 20 /sys/devices/platform/QCOM8060:*/chreset_timeout_cycles
21 Date: Nov 2015 21 Date: Nov 2015
22 KernelVersion: 4.4 22 KernelVersion: 4.4
23 Contact: "Sinan Kaya <okaya@kernel.org>" 23 Contact: "Sinan Kaya <okaya@kernel.org>"
24 Description: 24 Description:
25 Contains the platform specific 25 Contains the platform specific cycle value to wait after a
26 reset command is issued. If th 26 reset command is issued. If the value is chosen too short,
27 then the HW will issue a reset 27 then the HW will issue a reset failure interrupt. The value
28 is platform specific and shoul 28 is platform specific and should not be changed without
29 consultance. 29 consultance.
30 30
31 What: /sys/devices/platform/hidma-mg 31 What: /sys/devices/platform/hidma-mgmt*/dma_channels
32 /sys/devices/platform/QCOM8060 32 /sys/devices/platform/QCOM8060:*/dma_channels
33 Date: Nov 2015 33 Date: Nov 2015
34 KernelVersion: 4.4 34 KernelVersion: 4.4
35 Contact: "Sinan Kaya <okaya@kernel.org>" 35 Contact: "Sinan Kaya <okaya@kernel.org>"
36 Description: 36 Description:
37 Contains the number of dma cha 37 Contains the number of dma channels supported by one instance
38 of HIDMA hardware. The value m 38 of HIDMA hardware. The value may change from chip to chip.
39 39
40 What: /sys/devices/platform/hidma-mg 40 What: /sys/devices/platform/hidma-mgmt*/hw_version_major
41 /sys/devices/platform/QCOM8060 41 /sys/devices/platform/QCOM8060:*/hw_version_major
42 Date: Nov 2015 42 Date: Nov 2015
43 KernelVersion: 4.4 43 KernelVersion: 4.4
44 Contact: "Sinan Kaya <okaya@kernel.org>" 44 Contact: "Sinan Kaya <okaya@kernel.org>"
45 Description: 45 Description:
46 Version number major for the h 46 Version number major for the hardware.
47 47
48 What: /sys/devices/platform/hidma-mg 48 What: /sys/devices/platform/hidma-mgmt*/hw_version_minor
49 /sys/devices/platform/QCOM8060 49 /sys/devices/platform/QCOM8060:*/hw_version_minor
50 Date: Nov 2015 50 Date: Nov 2015
51 KernelVersion: 4.4 51 KernelVersion: 4.4
52 Contact: "Sinan Kaya <okaya@kernel.org>" 52 Contact: "Sinan Kaya <okaya@kernel.org>"
53 Description: 53 Description:
54 Version number minor for the h 54 Version number minor for the hardware.
55 55
56 What: /sys/devices/platform/hidma-mg 56 What: /sys/devices/platform/hidma-mgmt*/max_rd_xactions
57 /sys/devices/platform/QCOM8060 57 /sys/devices/platform/QCOM8060:*/max_rd_xactions
58 Date: Nov 2015 58 Date: Nov 2015
59 KernelVersion: 4.4 59 KernelVersion: 4.4
60 Contact: "Sinan Kaya <okaya@kernel.org>" 60 Contact: "Sinan Kaya <okaya@kernel.org>"
61 Description: 61 Description:
62 Contains a value between 0 and 62 Contains a value between 0 and 31. Maximum number of
63 read transactions that can be 63 read transactions that can be issued back to back.
64 Choosing a higher number gives 64 Choosing a higher number gives better performance but
65 can also cause performance red 65 can also cause performance reduction to other peripherals
66 sharing the same bus. 66 sharing the same bus.
67 67
68 What: /sys/devices/platform/hidma-mg 68 What: /sys/devices/platform/hidma-mgmt*/max_read_request
69 /sys/devices/platform/QCOM8060 69 /sys/devices/platform/QCOM8060:*/max_read_request
70 Date: Nov 2015 70 Date: Nov 2015
71 KernelVersion: 4.4 71 KernelVersion: 4.4
72 Contact: "Sinan Kaya <okaya@kernel.org>" 72 Contact: "Sinan Kaya <okaya@kernel.org>"
73 Description: 73 Description:
74 Size of each read request. The 74 Size of each read request. The value needs to be a power
75 of two and can be between 128 75 of two and can be between 128 and 1024.
76 76
77 What: /sys/devices/platform/hidma-mg 77 What: /sys/devices/platform/hidma-mgmt*/max_wr_xactions
78 /sys/devices/platform/QCOM8060 78 /sys/devices/platform/QCOM8060:*/max_wr_xactions
79 Date: Nov 2015 79 Date: Nov 2015
80 KernelVersion: 4.4 80 KernelVersion: 4.4
81 Contact: "Sinan Kaya <okaya@kernel.org>" 81 Contact: "Sinan Kaya <okaya@kernel.org>"
82 Description: 82 Description:
83 Contains a value between 0 and 83 Contains a value between 0 and 31. Maximum number of
84 write transactions that can be 84 write transactions that can be issued back to back.
85 Choosing a higher number gives 85 Choosing a higher number gives better performance but
86 can also cause performance red 86 can also cause performance reduction to other peripherals
87 sharing the same bus. 87 sharing the same bus.
88 88
89 89
90 What: /sys/devices/platform/hidma-mg 90 What: /sys/devices/platform/hidma-mgmt*/max_write_request
91 /sys/devices/platform/QCOM8060 91 /sys/devices/platform/QCOM8060:*/max_write_request
92 Date: Nov 2015 92 Date: Nov 2015
93 KernelVersion: 4.4 93 KernelVersion: 4.4
94 Contact: "Sinan Kaya <okaya@kernel.org>" 94 Contact: "Sinan Kaya <okaya@kernel.org>"
95 Description: 95 Description:
96 Size of each write request. Th 96 Size of each write request. The value needs to be a power
97 of two and can be between 128 97 of two and can be between 128 and 1024.
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