1 ==============================================
2 Freescale i.MX8 DDR Performance Monitoring Uni
3 ==============================================
4
5 There are no performance counters inside the D
6 signals are brought out to the edge of the con
7 counters is implemented. This is controlled by
8 control register which causes a large number o
9
10 Selection of the value for each counter is don
11 is one register for each counter. Counter 0 is
12 “time” and when expired causes a lock on i
13 interrupt is raised. If any other counter over
14 no interrupt is raised.
15
16 The "format" directory describes format of the
17 (AXI filter setting) fields of the perf_event_
18 devices/imx8_ddr0/format/. The "events" direct
19 hardware supported that can be used with perf
20 devices/imx8_ddr0/events/. The "caps" director
21 in DDR PMU, see /sys/bus/events_source/devices
22
23 .. code-block:: bash
24
25 perf stat -a -e imx8_ddr0/cycles/ cmd
26 perf stat -a -e imx8_ddr0/read/,imx8_d
27
28 AXI filtering is only used by CSV modes 0x41 (
29 to count reading or writing matches filter set
30 from different DRAM controller implementations
31 in the driver. You also can dump info from use
32 type of AXI filter (filter, enhanced_filter an
33 un-supported, and value 1 for supported.
34
35 * With DDR_CAP_AXI_ID_FILTER quirk(filter: 1,
36 Filter is defined with two configuration par
37 --AXI_ID defines AxID matching value.
38 --AXI_MASKING defines which bits of AxID are
39
40 - 0: corresponding bit is masked.
41 - 1: corresponding bit is not masked, i.
42
43 AXI_ID and AXI_MASKING are mapped on DPCR1 r
44 When non-masked bits are matching correspond
45 incremented. Perf counter is incremented if:
46
47 AxID && AXI_MASKING == AXI_ID && AXI_M
48
49 This filter doesn't support filter different
50 event at the same time as this filter is sha
51
52 .. code-block:: bash
53
54 perf stat -a -e imx8_ddr0/axid-read,axi_
55 perf stat -a -e imx8_ddr0/axid-write,axi
56
57 .. note::
58
59 axi_mask is inverted in userspace(i.e. s
60 it will be reverted in driver automatica
61 axi_id to monitor a specific id, rather
62
63 .. code-block:: bash
64
65 perf stat -a -e imx8_ddr0/axid-read,ax
66
67 * With DDR_CAP_AXI_ID_FILTER_ENHANCED quirk(fi
68 This is an extension to the DDR_CAP_AXI_ID_F
69 counting the number of bytes (as opposed to
70 read and write transactions concurrently wit
71
72 * With DDR_CAP_AXI_ID_PORT_CHANNEL_FILTER quir
73 There is a limitation in previous AXI filter
74 at the same time as the filter is shared bet
75 extension of AXI ID filter. One improvement
76 filter, means that it supports concurrently
77 improvement is that counter 1-3 supports AXI
78 selecting address channel or data channel.
79
80 Filter is defined with 2 configuration regis
81 --Counter N MASK COMP register - including A
82 --Counter N MUX CNTL register - including AX
83
84 - 0: address channel
85 - 1: data channel
86
87 PMU in DDR subsystem, only one single port0
88 which should be 0.
89
90 .. code-block:: bash
91
92 perf stat -a -e imx8_ddr0/axid-read,axi_
93 perf stat -a -e imx8_ddr0/axid-write,axi
94
95 .. note::
96
97 axi_channel is inverted in userspace, an
98 automatically. So that users do not need
99 monitor data channel from DDR transactio
100 meaningful.
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