1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0 2 2 3 ============================================== 3 =========================================================== 4 Amlogic SoC DDR Bandwidth Performance Monitori 4 Amlogic SoC DDR Bandwidth Performance Monitoring Unit (PMU) 5 ============================================== 5 =========================================================== 6 6 7 The Amlogic Meson G12 SoC contains a bandwidth 7 The Amlogic Meson G12 SoC contains a bandwidth monitor inside DRAM controller. 8 The monitor includes 4 channels. Each channel 8 The monitor includes 4 channels. Each channel can count the request accessing 9 DRAM. The channel can count up to 3 AXI port s 9 DRAM. The channel can count up to 3 AXI port simultaneously. It can be helpful 10 to show if the performance bottleneck is on DD 10 to show if the performance bottleneck is on DDR bandwidth. 11 11 12 Currently, this driver supports the following 12 Currently, this driver supports the following 5 perf events: 13 13 14 + meson_ddr_bw/total_rw_bytes/ 14 + meson_ddr_bw/total_rw_bytes/ 15 + meson_ddr_bw/chan_1_rw_bytes/ 15 + meson_ddr_bw/chan_1_rw_bytes/ 16 + meson_ddr_bw/chan_2_rw_bytes/ 16 + meson_ddr_bw/chan_2_rw_bytes/ 17 + meson_ddr_bw/chan_3_rw_bytes/ 17 + meson_ddr_bw/chan_3_rw_bytes/ 18 + meson_ddr_bw/chan_4_rw_bytes/ 18 + meson_ddr_bw/chan_4_rw_bytes/ 19 19 20 meson_ddr_bw/chan_{1,2,3,4}_rw_bytes/ events a 20 meson_ddr_bw/chan_{1,2,3,4}_rw_bytes/ events are channel-specific events. 21 Each channel support filtering, which can let 21 Each channel support filtering, which can let the channel to monitor 22 individual IP module in SoC. 22 individual IP module in SoC. 23 23 24 Below are DDR access request event filter keyw 24 Below are DDR access request event filter keywords: 25 25 26 + arm - from CPU 26 + arm - from CPU 27 + vpu_read1 - from OSD + VPP read 27 + vpu_read1 - from OSD + VPP read 28 + gpu - from 3D GPU 28 + gpu - from 3D GPU 29 + pcie - from PCIe controller 29 + pcie - from PCIe controller 30 + hdcp - from HDCP controller 30 + hdcp - from HDCP controller 31 + hevc_front - from HEVC codec front end 31 + hevc_front - from HEVC codec front end 32 + usb3_0 - from USB3.0 controller 32 + usb3_0 - from USB3.0 controller 33 + hevc_back - from HEVC codec back end 33 + hevc_back - from HEVC codec back end 34 + h265enc - from HEVC encoder 34 + h265enc - from HEVC encoder 35 + vpu_read2 - from DI read 35 + vpu_read2 - from DI read 36 + vpu_write1 - from VDIN write 36 + vpu_write1 - from VDIN write 37 + vpu_write2 - from di write 37 + vpu_write2 - from di write 38 + vdec - from legacy codec video de 38 + vdec - from legacy codec video decoder 39 + hcodec - from H264 encoder 39 + hcodec - from H264 encoder 40 + ge2d - from ge2d 40 + ge2d - from ge2d 41 + spicc1 - from SPI controller 1 41 + spicc1 - from SPI controller 1 42 + usb0 - from USB2.0 controller 0 42 + usb0 - from USB2.0 controller 0 43 + dma - from system DMA controller 43 + dma - from system DMA controller 1 44 + arb0 - from arb0 44 + arb0 - from arb0 45 + sd_emmc_b - from SD eMMC b controller 45 + sd_emmc_b - from SD eMMC b controller 46 + usb1 - from USB2.0 controller 1 46 + usb1 - from USB2.0 controller 1 47 + audio - from Audio module 47 + audio - from Audio module 48 + sd_emmc_c - from SD eMMC c controller 48 + sd_emmc_c - from SD eMMC c controller 49 + spicc2 - from SPI controller 2 49 + spicc2 - from SPI controller 2 50 + ethernet - from Ethernet controller 50 + ethernet - from Ethernet controller 51 51 52 52 53 Examples: 53 Examples: 54 54 55 + Show the total DDR bandwidth per seconds: 55 + Show the total DDR bandwidth per seconds: 56 56 57 .. code-block:: bash 57 .. code-block:: bash 58 58 59 perf stat -a -e meson_ddr_bw/total_rw_b 59 perf stat -a -e meson_ddr_bw/total_rw_bytes/ -I 1000 sleep 10 60 60 61 61 62 + Show individual DDR bandwidth from CPU and 62 + Show individual DDR bandwidth from CPU and GPU respectively, as well as 63 sum of them: 63 sum of them: 64 64 65 .. code-block:: bash 65 .. code-block:: bash 66 66 67 perf stat -a -e meson_ddr_bw/chan_1_rw_ 67 perf stat -a -e meson_ddr_bw/chan_1_rw_bytes,arm=1/ -I 1000 sleep 10 68 perf stat -a -e meson_ddr_bw/chan_2_rw_ 68 perf stat -a -e meson_ddr_bw/chan_2_rw_bytes,gpu=1/ -I 1000 sleep 10 69 perf stat -a -e meson_ddr_bw/chan_3_rw_ 69 perf stat -a -e meson_ddr_bw/chan_3_rw_bytes,arm=1,gpu=1/ -I 1000 sleep 10 70 70
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.