1 =============
2 Current State
3 =============
4
5 The following describes the current state of t
6 emulator.
7
8 In the following nomenclature is used to descr
9 instructions. It follows the conventions in t
10
11 ::
12
13 <S|D|E> = <single|double|extended>, no defau
14 {P|M|Z} = {round to +infinity,round to -infi
15 default = round to nearest
16
17 Note: items enclosed in {} are optional.
18
19 Floating Point Coprocessor Data Transfer Instr
20 ----------------------------------------------
21
22 LDF/STF - load and store floating
23
24 <LDF|STF>{cond}<S|D|E> Fd, Rn
25 <LDF|STF>{cond}<S|D|E> Fd, [Rn, #<expression>]
26 <LDF|STF>{cond}<S|D|E> Fd, [Rn], #<expression>
27
28 These instructions are fully implemented.
29
30 LFM/SFM - load and store multiple floating
31
32 Form 1 syntax:
33 <LFM|SFM>{cond}<S|D|E> Fd, <count>, [Rn]
34 <LFM|SFM>{cond}<S|D|E> Fd, <count>, [Rn, #<exp
35 <LFM|SFM>{cond}<S|D|E> Fd, <count>, [Rn], #<ex
36
37 Form 2 syntax:
38 <LFM|SFM>{cond}<FD,EA> Fd, <count>, [Rn]{!}
39
40 These instructions are fully implemented. The
41 for each floating point register into the memo
42 instruction. The format in memory is unlikely
43 other implementations, in particular the actua
44 mention of this is made in the ARM manuals.
45
46 Floating Point Coprocessor Register Transfer I
47 ----------------------------------------------
48
49 Conversions, read/write status/control registe
50
51 FLT{cond}<S,D,E>{P,M,Z} Fn, Rd Conver
52 FIX{cond}{P,M,Z} Rd, Fn Conver
53 WFS{cond} Rd Write
54 RFS{cond} Rd Read f
55 WFC{cond} Rd Write
56 RFC{cond} Rd Read f
57
58 FLT/FIX are fully implemented.
59
60 RFS/WFS are fully implemented.
61
62 RFC/WFC are fully implemented. RFC/WFC are su
63 presently check the CPU mode, and do an invali
64 from supervisor mode.
65
66 Compare instructions
67
68 CMF{cond} Fn, Fm Compare floating
69 CMFE{cond} Fn, Fm Compare floating with
70 CNF{cond} Fn, Fm Compare negated floati
71 CNFE{cond} Fn, Fm Compare negated floati
72
73 These are fully implemented.
74
75 Floating Point Coprocessor Data Instructions (
76 ----------------------------------------------
77
78 Dyadic operations:
79
80 ADF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
81 SUF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
82 RSF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
83 MUF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
84 DVF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
85 RDV{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
86
87 These are fully implemented.
88
89 FML{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
90 FDV{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
91 FRD{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
92
93 These are fully implemented as well. They use
94 non-fast versions. Hence, in this implementat
95 equivalent to the MUF/DVF/RDV instructions. T
96 to the ARM manual. The manual notes these are
97 operands, on the actual FPA11 hardware they do
98 extended precision operands. The emulator cur
99 the requested permissions conditions, and perf
100
101 RMF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
102
103 This is fully implemented.
104
105 Monadic operations:
106
107 MVF{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - move
108 MNF{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - move
109
110 These are fully implemented.
111
112 ABS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - abso
113 SQT{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - squa
114 RND{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - roun
115
116 These are fully implemented.
117
118 URD{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - unno
119 NRM{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - norm
120
121 These are implemented. URD is implemented usi
122 instruction. Since URD cannot return a unnorm
123 a NOP.
124
125 Library calls:
126
127 POW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
128 RPW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
129 POL{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> -
130
131 LOG{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - loga
132 LGN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - loga
133 EXP{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - expo
134 SIN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - sine
135 COS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - cosi
136 TAN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - tang
137 ASN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arcs
138 ACS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arcc
139 ATN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arct
140
141 These are not implemented. They are not curre
142 and are handled by routines in libc. These ar
143 hardware, but are handled by the floating poin
144 be implemented in future versions.
145
146 Signalling:
147
148 Signals are implemented. However current ELF
149 have a bug in them that prevents the module fr
150 is caused by a failure to alias fp_current to
151 current_set[0] correctly.
152
153 The kernel provided with this distribution (vm
154 a fix for this problem and also incorporates t
155 emulator directly. It is possible to run with
156 loaded with this kernel. It is provided as a
157 technology and for those who want to do floati
158 on signals. It is not strictly necessary to u
159
160 A module (either the one provided by Russell K
161 distribution) can be loaded to replace the fun
162 built into the kernel.
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