1 ==============================================
2 MFP Configuration for PXA2xx/PXA3xx Processors
3 ==============================================
4
5 Eric Miao <eric.miao@ma
6
7 MFP stands for Multi-Function Pin, which is th
8 later PXA series processors. This document de
9 and how board/platform driver authors could ma
10
11 Basic Concept
12 =============
13
14 Unlike the GPIO alternate function settings on
15 mechanism is introduced from PXA3xx to complet
16 out of the GPIO controller. In addition to pin
17 also controls the low power state, driving str
18 detection of each pin. Below is a diagram of
19 the MFP logic and the remaining SoC peripheral
20
21 +--------+
22 | |--(GPIO19)--+
23 | GPIO | |
24 | |--(GPIO...) |
25 +--------+ |
26 | +---------+
27 +--------+ +------>| |
28 | PWM2 |--(PWM_OUT)-------->| MFP |
29 +--------+ +------>| |----
30 | +---->| |
31 +--------+ | | +-->| |
32 | SSP2 |---(TXD)----+ | | +---------+
33 +--------+ | |
34 | |
35 +--------+ | |
36 | Keypad |--(MKOUT4)----+ |
37 +--------+ |
38 |
39 +--------+ |
40 | UART2 |---(TXD)--------+
41 +--------+
42
43 NOTE: the external pad is named as MFP_PIN_GPI
44 mean it's dedicated for GPIO19, only as a hint
45 can be routed from GPIO19 of the GPIO controll
46
47 To better understand the change from PXA25x/PX
48 to this new MFP mechanism, here are several ke
49
50 1. GPIO controller on PXA3xx is now a dedica
51 internal controllers like PWM, SSP and UA
52 which can be routed to external through o
53 can be routed through either MFP_PIN_GPIO
54 see arch/arm/mach-pxa/mfp-pxa300.h)
55
56 2. Alternate function configuration is remov
57 the remaining functions are pure GPIO-spe
58
59 - GPIO signal level control
60 - GPIO direction control
61 - GPIO level change detection
62
63 3. Low power state for each pin is now contr
64 PGSRx registers on PXA2xx are now useless
65
66 4. Wakeup detection is now controlled by MFP
67 wakeup from GPIO(s) any more, depending o
68 (as defined in pxa3xx-regs.h) controls th
69
70 NOTE: with such a clear separation of MFP and
71 mean it is a GPIO signal, and by MFP<xxx> or p
72 pad (or ball).
73
74 MFP API Usage
75 =============
76
77 For board code writers, here are some guidelin
78
79 1. include ONE of the following header files i
80
81 - #include "mfp-pxa25x.h"
82 - #include "mfp-pxa27x.h"
83 - #include "mfp-pxa300.h"
84 - #include "mfp-pxa320.h"
85 - #include "mfp-pxa930.h"
86
87 NOTE: only one file in your <board>.c, depe
88 because pin configuration definitions may c
89 same name, different meaning and settings o
90 for zylonite platform, which support both P
91 separate files are introduced: zylonite_pxa
92 (in addition to handle MFP configuration di
93 the other differences between the two combi
94
95 NOTE: PXA300 and PXA310 are almost identica
96 PXA310 supporting some additional ones), th
97 covered in a single mfp-pxa300.h.
98
99 2. prepare an array for the initial pin config
100
101 static unsigned long mainstone_pin_config
102 /* Chip Select */
103 GPIO15_nCS_1,
104
105 /* LCD - 16bpp Active TFT */
106 GPIOxx_TFT_LCD_16BPP,
107 GPIO16_PWM0_OUT, /* Backlight *
108
109 /* MMC */
110 GPIO32_MMC_CLK,
111 GPIO112_MMC_CMD,
112 GPIO92_MMC_DAT_0,
113 GPIO109_MMC_DAT_1,
114 GPIO110_MMC_DAT_2,
115 GPIO111_MMC_DAT_3,
116
117 ...
118
119 /* GPIO */
120 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
121 };
122
123 a) once the pin configurations are passed t
124 and written to the actual registers, they a
125 adding '__initdata' will help save some add
126
127 b) when there is only one possible pin conf
128 some simplified definitions can be used, e.
129 PXA25x and PXA27x processors
130
131 c) if by board design, a pin can be configu
132 from low power state, it can be 'OR'ed with
133
134 WAKEUP_ON_EDGE_BOTH
135 WAKEUP_ON_EDGE_RISE
136 WAKEUP_ON_EDGE_FALL
137 WAKEUP_ON_LEVEL_HIGH - specifically for
138
139 to indicate that this pin has the capabilit
140 and on which edge(s). This, however, doesn'
141 pin _will_ wakeup the system, it will only
142 invoked with the corresponding GPIO IRQ (GP
143 and eventually calls gpio_set_wake() for th
144
145 d) although PXA3xx MFP supports edge detect
146 internal logic will only wakeup the system
147 in ADxER registers are set, which can be we
148 corresponding peripheral, thus set_irq_wake
149 the peripheral IRQ to enable the wakeup.
150
151
152 MFP on PXA3xx
153 =============
154
155 Every external I/O pad on PXA3xx (excluding th
156 one MFP logic associated, and is controlled by
157
158 The MFPR has the following bit definitions (fo
159
160 31 16 15 14 13 12 11 1
161 +-------------------------+--+--+--+--+--+--
162 | RESERVED |PS|PU|PD| DRIVE
163 +-------------------------+--+--+--+--+--+--
164
165 Bit 3: RESERVED
166 Bit 4: EDGE_RISE_EN - enable detection of
167 Bit 5: EDGE_FALL_EN - enable detection of
168 Bit 6: EDGE_CLEAR - disable edge detecti
169 Bit 7: SLEEP_OE_N - enable outputs durin
170 Bit 8: SLEEP_DATA - output data on the p
171 Bit 9: SLEEP_SEL - selection control fo
172 Bit 13: PULLDOWN_EN - enable the internal
173 Bit 14: PULLUP_EN - enable the internal
174 Bit 15: PULL_SEL - pull state controlle
175 (0) or by PULL{UP,DO
176
177 Bit 0 - 2: AF_SEL - alternate function selec
178 Bit 10-12: DRIVE - drive strength and slew
179 0b000 - fast 1mA
180 0b001 - fast 2mA
181 0b002 - fast 3mA
182 0b003 - fast 4mA
183 0b004 - slow 6mA
184 0b005 - fast 6mA
185 0b006 - slow 10mA
186 0b007 - fast 10mA
187
188 MFP Design for PXA2xx/PXA3xx
189 ============================
190
191 Due to the difference of pin-mux handling betw
192 MFP API is introduced to cover both series of
193
194 The basic idea of this design is to introduce
195 configurations, these definitions are processo
196 the actual API invoked to convert these defini
197 make them effective there-after.
198
199 Files Involved
200 --------------
201
202 - arch/arm/mach-pxa/include/mach/mfp.h
203
204 for
205 1. Unified pin definitions - enum constant
206 2. processor-neutral bit definitions for a
207
208 - arch/arm/mach-pxa/mfp-pxa3xx.h
209
210 for PXA3xx specific MFPR register bit defini
211 configurations
212
213 - arch/arm/mach-pxa/mfp-pxa2xx.h
214
215 for PXA2xx specific definitions and PXA25x/P
216
217 - arch/arm/mach-pxa/mfp-pxa25x.h
218 arch/arm/mach-pxa/mfp-pxa27x.h
219 arch/arm/mach-pxa/mfp-pxa300.h
220 arch/arm/mach-pxa/mfp-pxa320.h
221 arch/arm/mach-pxa/mfp-pxa930.h
222
223 for processor specific definitions
224
225 - arch/arm/mach-pxa/mfp-pxa3xx.c
226 - arch/arm/mach-pxa/mfp-pxa2xx.c
227
228 for implementation of the pin configuration
229 processor.
230
231 Pin Configuration
232 -----------------
233
234 The following comments are copied from mfp.h
235 for most updated info)::
236
237 /*
238 * a possible MFP configuration is represe
239 *
240 * bit 0.. 9 - MFP Pin Number (1024 Pins
241 * bit 10..12 - Alternate Function Selecti
242 * bit 13..15 - Drive Strength
243 * bit 16..18 - Low Power Mode State
244 * bit 19..20 - Low Power Mode Edge Detect
245 * bit 21..22 - Run Mode Pull State
246 *
247 * to facilitate the definition, the follo
248 *
249 * MFP_CFG_DEFAULT - default MFP configura
250 * alternate function = 0,
251 * drive strength = fast 3mA (M
252 * low power mode = default
253 * edge detection = none
254 *
255 * MFP_CFG - default MFPR value with alte
256 * MFP_CFG_DRV - default MFPR value w
257 * pin drive strength
258 * MFP_CFG_LPM - default MFPR value w
259 * low power mode
260 * MFP_CFG_X - default MFPR value w
261 * pin drive strength and low p
262 */
263
264 Examples of pin configurations are::
265
266 #define GPIO94_SSP3_RXD MFP_CF
267
268 which reads GPIO94 can be configured as SSP
269 selection of 1, driving strength of 0b101,
270 modes.
271
272 NOTE: this is the default setting of this p
273 which can be modified a bit in board code,
274 do so, simply because this default setting
275 and is supposed to work in most cases.
276
277 Register Settings
278 -----------------
279
280 Register settings on PXA3xx for a pin confi
281 straight-forward, most bits can be converte
282 in a easier way. Two sets of MFPR values ar
283 ones and the low power mode ones, to allow
284
285 The conversion from a generic pin configura
286 settings on PXA2xx is a bit complicated: ma
287 including GAFRx, GPDRx, PGSRx, PWER, PKWR,
288 mfp-pxa2xx.c for how the conversion is made
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