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Linux/Documentation/arch/mips/ingenic-tcu.rst

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Diff markup

Differences between /Documentation/arch/mips/ingenic-tcu.rst (Version linux-6.12-rc7) and /Documentation/arch/ppc/ingenic-tcu.rst (Version linux-3.10.108)


  1 .. SPDX-License-Identifier: GPL-2.0               
  2                                                   
  3 ==============================================    
  4 Ingenic JZ47xx SoCs Timer/Counter Unit hardwar    
  5 ==============================================    
  6                                                   
  7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx    
  8 hardware block. It features up to eight channe    
  9 counters, timers, or PWM.                         
 10                                                   
 11 - JZ4725B, JZ4750, JZ4755 only have six TCU ch    
 12   have eight channels.                            
 13                                                   
 14 - JZ4725B introduced a separate channel, calle    
 15   (OST). It is a 32-bit programmable timer. On    
 16   64-bit.                                         
 17                                                   
 18 - Each one of the TCU channels has its own clo    
 19   different clocks (pclk, ext, rtc), gated, an    
 20                                                   
 21     - The watchdog and OST hardware blocks als    
 22       format in their register space.             
 23     - The TCU registers used to gate/ungate ca    
 24       OST clocks.                                 
 25                                                   
 26 - Each TCU channel works in one of two modes:     
 27                                                   
 28     - mode TCU1: channels cannot work in sleep    
 29       operate.                                    
 30     - mode TCU2: channels can work in sleep mo    
 31       more complicated than with TCU1 channels    
 32                                                   
 33 - The mode of each TCU channel depends on the     
 34                                                   
 35     - On the oldest SoCs (up to JZ4740), all o    
 36       TCU1 mode.                                  
 37     - On JZ4725B, channel 5 operates as TCU2,     
 38     - On newest SoCs (JZ4750 and above), chann    
 39       others operate as TCU1.                     
 40                                                   
 41 - Each channel can generate an interrupt. Some    
 42   line, some don't, and this changes between S    
 43                                                   
 44     - on older SoCs (JZ4740 and below), channe    
 45       own interrupt line; channels 2-7 share t    
 46     - On JZ4725B, channel 0 has its own interr    
 47       interrupt line; the OST uses the last in    
 48     - on newer SoCs (JZ4750 and above), channe    
 49       channels 0-4 and (if eight channels) 6-7    
 50       the OST uses the last interrupt line.       
 51                                                   
 52 Implementation                                    
 53 ==============                                    
 54                                                   
 55 The functionalities of the TCU hardware are sp    
 56                                                   
 57 ===========  =====                                
 58 clocks       drivers/clk/ingenic/tcu.c            
 59 interrupts   drivers/irqchip/irq-ingenic-tcu.c    
 60 timers       drivers/clocksource/ingenic-timer    
 61 OST          drivers/clocksource/ingenic-ost.c    
 62 PWM          drivers/pwm/pwm-jz4740.c             
 63 watchdog     drivers/watchdog/jz4740_wdt.c        
 64 ===========  =====                                
 65                                                   
 66 Because various functionalities of the TCU tha    
 67 and frameworks can be controlled from the same    
 68 drivers access their registers through the sam    
 69                                                   
 70 For more information regarding the devicetree     
 71 have a look at Documentation/devicetree/bindin    
                                                      

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