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Linux/Documentation/arch/parisc/registers.rst

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Diff markup

Differences between /Documentation/arch/parisc/registers.rst (Version linux-6.12-rc7) and /Documentation/arch/ppc/registers.rst (Version linux-4.16.18)


  1 ================================                  
  2 Register Usage for Linux/PA-RISC                  
  3 ================================                  
  4                                                   
  5 [ an asterisk is used for planned usage which     
  6                                                   
  7 General Registers as specified by ABI             
  8 =====================================             
  9                                                   
 10 Control Registers                                 
 11 -----------------                                 
 12                                                   
 13 =============================== ==============    
 14 CR 0 (Recovery Counter)         used for ptrac    
 15 CR 1-CR 7(undefined)            unused            
 16 CR 8 (Protection ID)            per-process va    
 17 CR 9, 12, 13 (PIDS)             unused            
 18 CR10 (CCR)                      lazy FPU savin    
 19 CR11                            as specified b    
 20 CR14 (interruption vector)      initialized to    
 21 CR15 (EIEM)                     initialized to    
 22 CR16 (Interval Timer)           read for cycle    
 23 CR17-CR22                       interruption p    
 24 CR19                            Interrupt Inst    
 25 CR20                            Interrupt Spac    
 26 CR21                            Interrupt Offs    
 27 CR22                            Interrupt PSW     
 28 CR23 (EIRR)                     read for pendi    
 29 CR24 (TR 0)                     Kernel Space P    
 30 CR25 (TR 1)                     User   Space P    
 31 CR26 (TR 2)                     not used          
 32 CR27 (TR 3)                     Thread descrip    
 33 CR28 (TR 4)                     not used          
 34 CR29 (TR 5)                     not used          
 35 CR30 (TR 6)                     current / 0       
 36 CR31 (TR 7)                     Temporary regi    
 37 =============================== ==============    
 38                                                   
 39 Space Registers (kernel mode)                     
 40 -----------------------------                     
 41                                                   
 42 =============================== ==============    
 43 SR0                             temporary spac    
 44 SR4-SR7                         set to 0          
 45 SR1                             temporary spac    
 46 SR2                             kernel should     
 47 SR3                             used for users    
 48 =============================== ==============    
 49                                                   
 50 Space Registers (user mode)                       
 51 ---------------------------                       
 52                                                   
 53 =============================== ==============    
 54 SR0                             temporary spac    
 55 SR1                             temporary spac    
 56 SR2                             holds space of    
 57 SR3                             holds user add    
 58 SR4-SR7                         Defines short     
 59 =============================== ==============    
 60                                                   
 61                                                   
 62 Processor Status Word                             
 63 ---------------------                             
 64                                                   
 65 =============================== ==============    
 66 W (64-bit addresses)            0                 
 67 E (Little-endian)               0                 
 68 S (Secure Interval Timer)       0                 
 69 T (Taken Branch Trap)           0                 
 70 H (Higher-privilege trap)       0                 
 71 L (Lower-privilege trap)        0                 
 72 N (Nullify next instruction)    used by C code    
 73 X (Data memory break disable)   0                 
 74 B (Taken Branch)                used by C code    
 75 C (code address translation)    1, 0 while exe    
 76 V (divide step correction)      used by C code    
 77 M (HPMC mask)                   0, 1 while exe    
 78 C/B (carry/borrow bits)         used by C code    
 79 O (ordered references)          1*                
 80 F (performance monitor)         0                 
 81 R (Recovery Counter trap)       0                 
 82 Q (collect interruption state)  1 (0 in code d    
 83 P (Protection Identifiers)      1*                
 84 D (Data address translation)    1, 0 while exe    
 85 I (external interrupt mask)     used by cli()/    
 86 =============================== ==============    
 87                                                   
 88 "Invisible" Registers                             
 89 ---------------------                             
 90                                                   
 91 =============================== ==============    
 92 PSW default W value             0                 
 93 PSW default E value             0                 
 94 Shadow Registers                used by interr    
 95 TOC enable bit                  1                 
 96 =============================== ==============    
 97                                                   
 98 ----------------------------------------------    
 99                                                   
100 The PA-RISC architecture defines 7 registers a    
101 Those are used in RETURN FROM INTERRUPTION AND    
102 the state save and restore time by eliminating    
103 (GR) saves and restores in interruption handle    
104 Shadow registers are the GRs 1, 8, 9, 16, 17,     
105                                                   
106 ----------------------------------------------    
107                                                   
108 Register usage notes, originally from John Mar    
109 notes from Randolph Chung.                        
110                                                   
111 For the general registers:                        
112                                                   
113 r1,r2,r19-r26,r28,r29 & r31 can be used withou    
114 course, you need to save them if you care abou    
115 another procedure. Some of the above registers    
116 that you should be aware of:                      
117                                                   
118     r1:                                           
119         The addil instruction is hardwired to     
120         so if you use that instruction be awar    
121                                                   
122     r2:                                           
123         This is the return pointer. In general    
124         use this, since you need the pointer t    
125         caller. However, it is grouped with th    
126         since the caller can't rely on the val    
127         when you return, i.e. you can copy r2     
128         and return through that register after    
129         that should not cause a problem for th    
130                                                   
131     r19-r22:                                      
132         these are generally regarded as tempor    
133         Note that in 64 bit they are arg7-arg4    
134                                                   
135     r23-r26:                                      
136         these are arg3-arg0, i.e. you can use     
137         don't care about the values that were     
138                                                   
139     r28,r29:                                      
140         are ret0 and ret1. They are what you p    
141         in. r28 is the primary return. When re    
142         r29 may also be used to pass data back    
143                                                   
144     r30:                                          
145         stack pointer                             
146                                                   
147     r31:                                          
148         the ble instruction puts the return po    
149                                                   
150                                                   
151     r3-r18,r27,r30 need to be saved and restor    
152     general purpose registers. r27 is the data    
153     used to make references to global variable    
154     the stack pointer.                            
                                                      

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