1 ===================================
2 DSCR (Data Stream Control Register)
3 ===================================
4
5 DSCR register in powerpc allows user to have s
6 stream in the processor. Please refer to the I
7 for more detailed information regarding how to
8 control of the prefetches . This document here
9 support for DSCR, related kernel objects, its
10 user interface.
11
12 (A) Data Structures:
13
14 (1) thread_struct::
15
16 dscr /* Thread DSCR
17 dscr_inherit /* Thread has
18
19 (2) PACA::
20
21 dscr_default /* per-CPU DSC
22
23 (3) sysfs.c::
24
25 dscr_default /* System DSCR
26
27 (B) Scheduler Changes:
28
29 Scheduler will write the per-CPU DSCR
30 CPU's PACA value into the register if
31 cleared which means that it has not ch
32 If the dscr_inherit value is set which
33 default DSCR value, scheduler will wri
34 now be contained in thread struct's ds
35 the per-CPU default PACA based DSCR va
36
37 NOTE: Please note here that the system
38 gets used directly in the scheduler pr
39
40 (C) SYSFS Interface:
41
42 - Global DSCR default: /sys/d
43 - CPU specific DSCR default: /sys/d
44
45 Changing the global DSCR default in th
46 specific DSCR defaults immediately in
47 the current process has the dscr_inher
48 value into every CPU's DSCR register r
49 thread's DSCR value as well.
50
51 Changing the CPU specific DSCR default
52 the same thing as above but unlike the
53 stuff for that particular CPU instead
54
55 (D) User Space Instructions:
56
57 The DSCR register can be accessed in t
58 two SPR numbers available for that pur
59
60 (1) Problem state SPR: 0x03
61 (2) Privileged state SPR: 0x11
62
63 Accessing DSCR through privileged SPR
64 works, as it is emulated following an
65 inside the kernel. Both mfspr and mtsp
66
67 Accessing DSCR through user level SPR
68 create a facility unavailable exceptio
69 all mfspr instruction based read attem
70 where as the first mtspr instruction b
71 the DSCR facility for the next time ar
72 setting DSCR facility in the FSCR regi
73
74 (E) Specifics about 'dscr_inherit':
75
76 The thread struct element 'dscr_inheri
77 in question has attempted and changed
78 following methods. This element signif
79 use the CPU default DSCR value or its
80 kernel.
81
82 (1) mtspr instruction (SPR n
83 (2) mtspr instruction (SPR n
84 (3) ptrace interface (Expli
85
86 Any child of the process created after
87 this same behaviour as well.
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