1 ======
2 Ptrace
3 ======
4
5 GDB intends to support the following hardware
6 processors:
7
8 4 hardware breakpoints (IAC)
9 2 hardware watchpoints (read, write and read-w
10 2 value conditions for the hardware watchpoint
11
12 For that, we need to extend ptrace so that GDB
13 resources. Since we're extending, we're trying
14 that's extendable and that covers both BookE a
15 that GDB doesn't need to special-case each of
16 following 3 new ptrace requests.
17
18 1. PPC_PTRACE_GETHWDBGINFO
19 ============================
20
21 Query for GDB to discover the hardware debug f
22 be returned here is the minimum alignment for
23 BookE processors don't have restrictions here,
24 an 8-byte alignment restriction for hardware w
25 adding special cases to GDB based on what it s
26
27 Since we're at it, we added other useful info
28 GDB: this query will return the number of hard
29 watchpoints and whether it supports a range of
30 The query will fill the following structure pr
31
32 struct ppc_debug_info {
33 unit32_t version;
34 unit32_t num_instruction_bps;
35 unit32_t num_data_bps;
36 unit32_t num_condition_regs;
37 unit32_t data_bp_alignment;
38 unit32_t sizeof_condition; /* size of t
39 uint64_t features; /* bitmask of the in
40 };
41
42 features will have bits indicating whether the
43
44 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE
45 #define PPC_DEBUG_FEATURE_INSN_BP_MASK
46 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE
47 #define PPC_DEBUG_FEATURE_DATA_BP_MASK
48 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR
49 #define PPC_DEBUG_FEATURE_DATA_BP_ARCH_31
50
51 2. PPC_PTRACE_SETHWDEBUG
52
53 Sets a hardware breakpoint or watchpoint, acco
54
55 struct ppc_hw_breakpoint {
56 uint32_t version;
57 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
58 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
59 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
60 uint32_t trigger_type; /* only s
61 #define PPC_BREAKPOINT_MODE_EXACT
62 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
63 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE
64 #define PPC_BREAKPOINT_MODE_MASK
65 uint32_t addr_mode; /* addres
66
67 #define PPC_BREAKPOINT_CONDITION_MODE 0x3
68 #define PPC_BREAKPOINT_CONDITION_NONE 0x0
69 #define PPC_BREAKPOINT_CONDITION_AND 0x1
70 #define PPC_BREAKPOINT_CONDITION_EXACT 0x1
71 #define PPC_BREAKPOINT_CONDITION_OR 0x2
72 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3
73 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00
74 #define PPC_BREAKPOINT_CONDITION_BE(n) (1<<
75 uint32_t condition_mode; /* break/
76
77 uint64_t addr;
78 uint64_t addr2;
79 uint64_t condition_value;
80 };
81
82 A request specifies one event, not necessarily
83 For instance, if the request is for a watchpoi
84 DAC and DVC registers will be set in the same
85
86 With this GDB can ask for all kinds of hardwar
87 that the BookE supports. COMEFROM breakpoints
88 are not contemplated, but that is out of the s
89
90 ptrace will return an integer (handle) uniquel
91 watchpoint just created. This integer will be
92 request to ask for its removal. Return -ENOSPC
93 can't be allocated on the registers.
94
95 Some examples of using the structure to:
96
97 - set a breakpoint in the first breakpoint reg
98
99 p.version = PPC_DEBUG_CURRENT_VERS
100 p.trigger_type = PPC_BREAKPOINT_TRIGGER
101 p.addr_mode = PPC_BREAKPOINT_MODE_EX
102 p.condition_mode = PPC_BREAKPOINT_CONDITI
103 p.addr = (uint64_t) address;
104 p.addr2 = 0;
105 p.condition_value = 0;
106
107 - set a watchpoint which triggers on reads in
108
109 p.version = PPC_DEBUG_CURRENT_VERS
110 p.trigger_type = PPC_BREAKPOINT_TRIGGER
111 p.addr_mode = PPC_BREAKPOINT_MODE_EX
112 p.condition_mode = PPC_BREAKPOINT_CONDITI
113 p.addr = (uint64_t) address;
114 p.addr2 = 0;
115 p.condition_value = 0;
116
117 - set a watchpoint which triggers only with a
118
119 p.version = PPC_DEBUG_CURRENT_VERS
120 p.trigger_type = PPC_BREAKPOINT_TRIGGER
121 p.addr_mode = PPC_BREAKPOINT_MODE_EX
122 p.condition_mode = PPC_BREAKPOINT_CONDITI
123 p.addr = (uint64_t) address;
124 p.addr2 = 0;
125 p.condition_value = (uint64_t) condition;
126
127 - set a ranged hardware breakpoint::
128
129 p.version = PPC_DEBUG_CURRENT_VERS
130 p.trigger_type = PPC_BREAKPOINT_TRIGGER
131 p.addr_mode = PPC_BREAKPOINT_MODE_RA
132 p.condition_mode = PPC_BREAKPOINT_CONDITI
133 p.addr = (uint64_t) begin_range
134 p.addr2 = (uint64_t) end_range;
135 p.condition_value = 0;
136
137 - set a watchpoint in server processors (BookS
138
139 p.version = 1;
140 p.trigger_type = PPC_BREAKPOINT_TRIGGER
141 p.addr_mode = PPC_BREAKPOINT_MODE_RA
142 or
143 p.addr_mode = PPC_BREAKPOINT_MODE_EX
144
145 p.condition_mode = PPC_BREAKPOINT_CONDITI
146 p.addr = (uint64_t) begin_range
147 /* For PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE
148 * addr2 - addr <= 8 Bytes.
149 */
150 p.addr2 = (uint64_t) end_range;
151 p.condition_value = 0;
152
153 3. PPC_PTRACE_DELHWDEBUG
154
155 Takes an integer which identifies an existing
156 (i.e., the value returned from PTRACE_SETHWDEB
157 corresponding breakpoint or watchpoint..
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