1 =================
2 x86 IOMMU Support
3 =================
4
5 The architecture specs can be obtained from th
6
7 - Intel: http://www.intel.com/content/dam/www/
8 - AMD: https://www.amd.com/content/dam/amd/en/
9
10 This guide gives a quick cheat sheet for some
11
12 Basic stuff
13 -----------
14
15 ACPI enumerates and lists the different IOMMUs
16 device scope relationships between devices and
17 them.
18
19 Some ACPI Keywords:
20
21 - DMAR - Intel DMA Remapping table
22 - DRHD - Intel DMA Remapping Hardware Unit Def
23 - RMRR - Intel Reserved Memory Region Reportin
24 - IVRS - AMD I/O Virtualization Reporting Stru
25 - IVDB - AMD I/O Virtualization Definition Blo
26 - IVHD - AMD I/O Virtualization Hardware Defin
27
28 What is Intel RMRR?
29 ^^^^^^^^^^^^^^^^^^^
30
31 There are some devices the BIOS controls, for
32 PS2 emulation. The regions of memory used for
33 reserved in the e820 map. When we turn on DMA
34 regions will fail. Hence BIOS uses RMRR to spe
35 devices that need to access these regions. OS
36 unity mappings for these regions for these dev
37
38 What is AMD IVRS?
39 ^^^^^^^^^^^^^^^^^
40
41 The architecture defines an ACPI-compatible da
42 Virtualization Reporting Structure (IVRS) that
43 related to I/O virtualization to system softwa
44 configuration and capabilities of the IOMMUs c
45 well as information about the devices that eac
46
47 The IVRS provides information about the follow
48
49 - IOMMUs present in the platform including the
50 - System I/O topology relevant to each IOMMU
51 - Peripheral devices that cannot be otherwise
52 - Memory regions used by SMI/SMM, platform fir
53
54 How is an I/O Virtual Address (IOVA) generated
55 ----------------------------------------------
56
57 Well behaved drivers call dma_map_*() calls be
58 that needs to perform DMA. Once DMA is complet
59 required, driver performs dma_unmap_*() calls
60
61 Intel Specific Notes
62 --------------------
63
64 Graphics Problems?
65 ^^^^^^^^^^^^^^^^^^
66
67 If you encounter issues with graphics devices,
68 option intel_iommu=igfx_off to turn off the in
69 If this fixes anything, please ensure you file
70
71 Some exceptions to IOVA
72 ^^^^^^^^^^^^^^^^^^^^^^^
73
74 Interrupt ranges are not address translated, (
75 The same is true for peer to peer transactions
76 address from PCI MMIO ranges so they are not a
77
78 AMD Specific Notes
79 ------------------
80
81 Graphics Problems?
82 ^^^^^^^^^^^^^^^^^^
83
84 If you encounter issues with integrated graphi
85 option iommu=pt to the kernel command line use
86 this fixes anything, please ensure you file a
87
88 Fault reporting
89 ---------------
90 When errors are reported, the IOMMU signals vi
91 reason and device that caused it is printed on
92
93
94 Kernel Log Samples
95 ------------------
96
97 Intel Boot Messages
98 ^^^^^^^^^^^^^^^^^^^
99
100 Something like this gets printed indicating pr
101 in ACPI:
102
103 ::
104
105 ACPI: DMAR (v001 A M I OEMDMAR 0x000
106
107 When DMAR is being processed and initialized b
108 and any RMRR's processed:
109
110 ::
111
112 ACPI DMAR:Host address width 36
113 ACPI DMAR:DRHD (flags: 0x00000000)base
114 ACPI DMAR:DRHD (flags: 0x00000000)base
115 ACPI DMAR:DRHD (flags: 0x00000001)base
116 ACPI DMAR:RMRR base: 0x00000000000ed00
117 ACPI DMAR:RMRR base: 0x000000007f60000
118
119 When DMAR is enabled for use, you will notice:
120
121 ::
122
123 PCI-DMA: Using DMAR IOMMU
124
125 Intel Fault reporting
126 ^^^^^^^^^^^^^^^^^^^^^
127
128 ::
129
130 DMAR:[DMA Write] Request device [00:02
131 DMAR:[fault reason 05] PTE Write acces
132 DMAR:[DMA Write] Request device [00:02
133 DMAR:[fault reason 05] PTE Write acces
134
135 AMD Boot Messages
136 ^^^^^^^^^^^^^^^^^
137
138 Something like this gets printed indicating pr
139
140 ::
141
142 iommu: Default domain type: Translated
143 iommu: DMA domain TLB invalidation pol
144
145 AMD Fault reporting
146 ^^^^^^^^^^^^^^^^^^^
147
148 ::
149
150 AMD-Vi: Event logged [IO_PAGE_FAULT do
151 AMD-Vi: Event logged [IO_PAGE_FAULT de
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