1 .. SPDX-License-Identifier: GPL-2.0
2
3 =====================================
4 Asynchronous Transfers/Transforms API
5 =====================================
6
7 .. Contents
8
9 1. INTRODUCTION
10
11 2 GENEALOGY
12
13 3 USAGE
14 3.1 General format of the API
15 3.2 Supported operations
16 3.3 Descriptor management
17 3.4 When does the operation execute?
18 3.5 When does the operation complete?
19 3.6 Constraints
20 3.7 Example
21
22 4 DMAENGINE DRIVER DEVELOPER NOTES
23 4.1 Conformance points
24 4.2 "My application needs exclusive control
25
26 5 SOURCE
27
28 1. Introduction
29 ===============
30
31 The async_tx API provides methods for describi
32 bulk memory transfers/transforms with support
33 dependencies. It is implemented as a dmaengin
34 the details of different hardware offload engi
35 that is written to the API can optimize for as
36 the API will fit the chain of operations to th
37 resources.
38
39 2.Genealogy
40 ===========
41
42 The API was initially designed to offload the
43 xor-parity-calculations of the md-raid5 driver
44 present in the Intel(R) Xscale series of I/O p
45 on the 'dmaengine' layer developed for offload
46 network stack using Intel(R) I/OAT engines. T
47 features surfaced as a result:
48
49 1. implicit synchronous path: users of the API
50 the platform they are running on has offloa
51 operation will be offloaded when an engine
52 in software otherwise.
53 2. cross channel dependency chains: the API al
54 operations to be submitted, like xor->copy-
55 API automatically handles cases where the t
56 to another implies a hardware channel switc
57 3. dmaengine extensions to support multiple cl
58 beyond 'memcpy'
59
60 3. Usage
61 ========
62
63 3.1 General format of the API
64 -----------------------------
65
66 ::
67
68 struct dma_async_tx_descriptor *
69 async_<operation>(<op specific parameters>,
70
71 3.2 Supported operations
72 ------------------------
73
74 ======== ====================================
75 memcpy memory copy between a source and a d
76 memset fill a destination buffer with a byt
77 xor xor a series of source buffers and w
78 destination buffer
79 xor_val xor a series of source buffers and s
80 result is zero. The implementation
81 writes to memory
82 pq generate the p+q (raid6 syndrome) fr
83 pq_val validate that a p and or q buffer ar
84 sources
85 datap (raid6_datap_recov) recover a raid6
86 from the given sources
87 2data (raid6_2data_recov) recover 2 raid6
88 sources
89 ======== ====================================
90
91 3.3 Descriptor management
92 -------------------------
93
94 The return value is non-NULL and points to a '
95 has been queued to execute asynchronously. De
96 resources, under control of the offload engine
97 operations complete. When an application need
98 operations it must guarantee that the descript
99 before the dependency is submitted. This requ
100 acknowledged by the application before the off
101 recycle (or free) the descriptor. A descripto
102 following methods:
103
104 1. setting the ASYNC_TX_ACK flag if no child o
105 2. submitting an unacknowledged descriptor as
106 async_tx call will implicitly set the ackno
107 3. calling async_tx_ack() on the descriptor.
108
109 3.4 When does the operation execute?
110 ------------------------------------
111
112 Operations do not immediately issue after retu
113 async_<operation> call. Offload engine driver
114 improve performance by reducing the number of
115 manage the channel. Once a driver-specific th
116 automatically issues pending operations. An a
117 event by calling async_tx_issue_pending_all().
118 channels since the application has no knowledg
119 mapping.
120
121 3.5 When does the operation complete?
122 -------------------------------------
123
124 There are two methods for an application to le
125 of an operation.
126
127 1. Call dma_wait_for_async_tx(). This call ca
128 it polls for the completion of the operatio
129 chains and issuing pending operations.
130 2. Specify a completion callback. The callbac
131 context if the offload engine driver suppor
132 called in application context if the operat
133 synchronously in software. The callback ca
134 async_<operation>, or when the application
135 unknown length it can use the async_trigger
136 completion interrupt/callback at the end of
137
138 3.6 Constraints
139 ---------------
140
141 1. Calls to async_<operation> are not permitte
142 contexts are permitted provided constraint
143 2. Completion callback routines cannot submit
144 results in recursion in the synchronous cas
145 acquired twice in the asynchronous case.
146
147 3.7 Example
148 -----------
149
150 Perform a xor->copy->xor operation where each
151 result from the previous operation::
152
153 #include <linux/async_tx.h>
154
155 static void callback(void *param)
156 {
157 complete(param);
158 }
159
160 #define NDISKS 2
161
162 static void run_xor_copy_xor(struct page *
163 struct page *
164 size_t xor_le
165 struct page *
166 struct page *
167 size_t copy_l
168 {
169 struct dma_async_tx_descriptor *tx
170 struct async_submit_ctl submit;
171 addr_conv_t addr_conv[NDISKS];
172 struct completion cmp;
173
174 init_async_submit(&submit, ASYNC_T
175 addr_conv);
176 tx = async_xor(xor_dest, xor_srcs,
177
178 submit.depend_tx = tx;
179 tx = async_memcpy(copy_dest, copy_
180
181 init_completion(&cmp);
182 init_async_submit(&submit, ASYNC_T
183 callback, &cmp, ad
184 tx = async_xor(xor_dest, xor_srcs,
185
186 async_tx_issue_pending_all();
187
188 wait_for_completion(&cmp);
189 }
190
191 See include/linux/async_tx.h for more informat
192 ops_run_* and ops_complete_* routines in drive
193 implementation examples.
194
195 4. Driver Development Notes
196 ===========================
197
198 4.1 Conformance points
199 ----------------------
200
201 There are a few conformance points required in
202 accommodate assumptions made by applications u
203
204 1. Completion callbacks are expected to happen
205 2. dma_async_tx_descriptor fields are never ma
206 3. Use async_tx_run_dependencies() in the desc
207 handle submission of dependent operations
208
209 4.2 "My application needs exclusive control of
210 ----------------------------------------------
211
212 Primarily this requirement arises from cases w
213 is being used to support device-to-memory oper
214 performing these operations cannot, for many p
215 be shared. For these cases the dma_request_ch
216 provided.
217
218 The interface is::
219
220 struct dma_chan *dma_request_channel(dma_cap
221 dma_fil
222 void *f
223
224 Where dma_filter_fn is defined as::
225
226 typedef bool (*dma_filter_fn)(struct dma_cha
227
228 When the optional 'filter_fn' parameter is set
229 dma_request_channel simply returns the first c
230 capability mask. Otherwise, when the mask par
231 specifying the necessary channel, the filter_f
232 disposition the available channels in the syst
233 is called once for each free channel in the sy
234 suitable channel filter_fn returns DMA_ACK whi
235 be the return value from dma_request_channel.
236 this interface is exclusive to the caller, unt
237 is called.
238
239 The DMA_PRIVATE capability flag is used to tag
240 not be used by the general-purpose allocator.
241 initialization time if it is known that a chan
242 private. Alternatively, it is set when dma_re
243 unused "public" channel.
244
245 A couple caveats to note when implementing a d
246
247 1. Once a channel has been privately allocated
248 considered by the general-purpose allocator
249 dma_release_channel().
250 2. Since capabilities are specified at the dev
251 with multiple channels will either have all
252 channels private.
253
254 5. Source
255 ---------
256
257 include/linux/dmaengine.h:
258 core header file for DMA drivers and api u
259 drivers/dma/dmaengine.c:
260 offload engine channel management routines
261 drivers/dma/:
262 location for offload engine drivers
263 include/linux/async_tx.h:
264 core header file for the async_tx api
265 crypto/async_tx/async_tx.c:
266 async_tx interface to dmaengine and common
267 crypto/async_tx/async_memcpy.c:
268 copy offload
269 crypto/async_tx/async_xor.c:
270 xor and xor zero sum offload
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