1 # SPDX-License-Identifier: (GPL-2.0-only OR BS
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/access-cont
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Generic Domain Access Controllers
8
9 maintainers:
10 - Oleksii Moisieiev <oleksii_moisieiev@epam.c
11
12 description: |+
13 Common access controllers properties
14
15 Access controllers are in charge of stating
16 their responsibility (their domain) can be a
17 compartment can be a cluster of CPUs (or cop
18 or a group of hardware blocks. An access con
19 resources covered by the access controller.
20
21 This device tree binding can be used to bind
22 controller provided by access-controllers pr
23 is a consumer and the access controller is t
24
25 An access controller can be represented by a
26 can provide one or more configuration parame
27 of the consumer device. A consumer node can
28 and a set of phandle arguments, specified by
29 property in the access controller node.
30
31 Access controllers are typically used to set
32 hardware block and grant access to it. Any o
33 controller. The capabilities of each access
34 binding of the access controller device.
35
36 Each node can be a consumer for the several
37
38 # always select the core schema
39 select: true
40
41 properties:
42 "#access-controller-cells":
43 description:
44 Number of cells in an access-controllers
45 Can be any value as specified by device
46 of a particular provider. The node is an
47
48 access-controller-names:
49 $ref: /schemas/types.yaml#/definitions/str
50 description:
51 A list of access-controllers names, sort
52 access-controllers entries. Consumer dri
53 access-controller-names to match with ex
54
55 access-controllers:
56 $ref: /schemas/types.yaml#/definitions/pha
57 description:
58 A list of access controller specifiers,
59 bindings of the access-controllers provi
60
61 additionalProperties: true
62
63 examples:
64 - |
65 clock_controller: access-controllers@50000
66 reg = <0x50000 0x400>;
67 #access-controller-cells = <2>;
68 };
69
70 bus_controller: bus@60000 {
71 reg = <0x60000 0x10000>;
72 #address-cells = <1>;
73 #size-cells = <1>;
74 ranges;
75 #access-controller-cells = <3>;
76
77 uart4: serial@60100 {
78 reg = <0x60100 0x400>;
79 clocks = <&clk_serial>;
80 access-controllers = <&clock_contr
81 <&bus_control
82 access-controller-names = "clock",
83 };
84 };
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