1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/arm/amlogic 4 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 7 title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
8 8
9 maintainers: 9 maintainers:
10 - Martin Blumenstingl <martin.blumenstingl@go 10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
11 11
12 description: | 12 description: |
13 The Meson8/Meson8b/Meson8m2 SoCs have a regi 13 The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
14 contains registers for various IP blocks suc 14 contains registers for various IP blocks such as pin-controller bits for
15 the BSD_EN and TEST_N GPIOs as well as some 15 the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
16 The registers can be accessed directly when 16 The registers can be accessed directly when not running in "secure mode".
17 When "secure mode" is enabled then these reg 17 When "secure mode" is enabled then these registers have to be accessed
18 through secure monitor calls. 18 through secure monitor calls.
19 19
20 properties: 20 properties:
21 compatible: 21 compatible:
22 items: 22 items:
23 - enum: 23 - enum:
24 - amlogic,meson8-secbus2 24 - amlogic,meson8-secbus2
25 - amlogic,meson8b-secbus2 25 - amlogic,meson8b-secbus2
26 - const: syscon 26 - const: syscon
27 27
28 reg: 28 reg:
29 maxItems: 1 29 maxItems: 1
30 30
31 required: 31 required:
32 - compatible 32 - compatible
33 - reg 33 - reg
34 34
35 additionalProperties: false 35 additionalProperties: false
36 36
37 examples: 37 examples:
38 - | 38 - |
39 secbus2: system-controller@4000 { 39 secbus2: system-controller@4000 {
40 compatible = "amlogic,meson8-secbus2", " 40 compatible = "amlogic,meson8-secbus2", "syscon";
41 reg = <0x4000 0x2000>; 41 reg = <0x4000 0x2000>;
42 }; 42 };
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