1 Atmel system registers 1 Atmel system registers
2 2
3 Chipid required properties: 3 Chipid required properties:
4 - compatible: Should be "atmel,sama5d2-chipid" 4 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
5 - reg : Should contain registers location and 5 - reg : Should contain registers location and length
6 6
7 PIT Timer required properties: 7 PIT Timer required properties:
8 - compatible: Should be "atmel,at91sam9260-pit 8 - compatible: Should be "atmel,at91sam9260-pit"
9 - reg: Should contain registers location and l 9 - reg: Should contain registers location and length
10 - interrupts: Should contain interrupt for the 10 - interrupts: Should contain interrupt for the PIT which is the IRQ line
11 shared across all System Controller members. 11 shared across all System Controller members.
12 12
13 PIT64B Timer required properties: 13 PIT64B Timer required properties:
14 - compatible: Should be "microchip,sam9x60-pit 14 - compatible: Should be "microchip,sam9x60-pit64b" or
15 "microchip,sam9x7-pit6 15 "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
16 - reg: Should contain registers location and l 16 - reg: Should contain registers location and length
17 - interrupts: Should contain interrupt for PIT 17 - interrupts: Should contain interrupt for PIT64B timer
18 - clocks: Should contain the available clock s 18 - clocks: Should contain the available clock sources for PIT64B timer.
19 19
20 System Timer (ST) required properties: 20 System Timer (ST) required properties:
21 - compatible: Should be "atmel,at91rm9200-st", 21 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
22 - reg: Should contain registers location and l 22 - reg: Should contain registers location and length
23 - interrupts: Should contain interrupt for the 23 - interrupts: Should contain interrupt for the ST which is the IRQ line
24 shared across all System Controller members. 24 shared across all System Controller members.
25 - clocks: phandle to input clock. 25 - clocks: phandle to input clock.
26 Its subnodes can be: 26 Its subnodes can be:
27 - watchdog: compatible should be "atmel,at91rm 27 - watchdog: compatible should be "atmel,at91rm9200-wdt"
28 28
29 RAMC SDRAM/DDR Controller required properties: 29 RAMC SDRAM/DDR Controller required properties:
30 - compatible: Should be "atmel,at91rm9200-sdra 30 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
31 "atmel,at91sam9260-sdr 31 "atmel,at91sam9260-sdramc",
32 "atmel,at91sam9g45-ddr 32 "atmel,at91sam9g45-ddramc",
33 "atmel,sama5d3-ddramc" 33 "atmel,sama5d3-ddramc",
34 "microchip,sam9x60-ddr 34 "microchip,sam9x60-ddramc",
35 "microchip,sama7g5-udd 35 "microchip,sama7g5-uddrc",
36 "microchip,sam9x7-ddra 36 "microchip,sam9x7-ddramc", "atmel,sama5d3-ddramc".
37 - reg: Should contain registers location and l 37 - reg: Should contain registers location and length
38 38
39 Examples: 39 Examples:
40 40
41 ramc0: ramc@ffffe800 { 41 ramc0: ramc@ffffe800 {
42 compatible = "atmel,at91sam9g4 42 compatible = "atmel,at91sam9g45-ddramc";
43 reg = <0xffffe800 0x200>; 43 reg = <0xffffe800 0x200>;
44 }; 44 };
45 45
46 Security Module (SECUMOD) 46 Security Module (SECUMOD)
47 47
48 The Security Module macrocell provides all nec 48 The Security Module macrocell provides all necessary secure functions to avoid
49 voltage, temperature, frequency and mechanical 49 voltage, temperature, frequency and mechanical attacks on the chip. It also
50 embeds secure memories that can be scrambled. 50 embeds secure memories that can be scrambled.
51 51
52 The Security Module also offers the PIOBU pins 52 The Security Module also offers the PIOBU pins which can be used as GPIO pins.
53 Note that they maintain their voltage during B 53 Note that they maintain their voltage during Backup/Self-refresh.
54 54
55 required properties: 55 required properties:
56 - compatible: Should be "atmel,<chip>-secumod" 56 - compatible: Should be "atmel,<chip>-secumod", "syscon".
57 <chip> can be "sama5d2". 57 <chip> can be "sama5d2".
58 - reg: Should contain registers location and l 58 - reg: Should contain registers location and length
59 - gpio-controller: Marks the port as GPIO 59 - gpio-controller: Marks the port as GPIO controller.
60 - #gpio-cells: There are 2. The pin n 60 - #gpio-cells: There are 2. The pin number is the
61 first, the second repr 61 first, the second represents additional
62 parameters such as GPI 62 parameters such as GPIO_ACTIVE_HIGH/LOW.
63 63
64 64
65 secumod@fc040000 { 65 secumod@fc040000 {
66 compatible = "atmel,sama5d2-se 66 compatible = "atmel,sama5d2-secumod", "syscon";
67 reg = <0xfc040000 0x100>; 67 reg = <0xfc040000 0x100>;
68 gpio-controller; 68 gpio-controller;
69 #gpio-cells = <2>; 69 #gpio-cells = <2>;
70 }; 70 };
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