1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/arm/freesca 4 $id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-sim.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale i.MX7ULP System Integration M 7 title: Freescale i.MX7ULP System Integration Module
8 8
9 maintainers: 9 maintainers:
10 - Shawn Guo <shawnguo@kernel.org> 10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de> 11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com> 12 - Fabio Estevam <festevam@gmail.com>
13 13
14 description: | 14 description: |
15 The system integration module (SIM) provides 15 The system integration module (SIM) provides system control and chip configuration
16 registers. In this module, chip revision inf 16 registers. In this module, chip revision information is located in JTAG ID register,
17 and a set of registers have been made availa 17 and a set of registers have been made available in DGO domain for SW use, with the
18 objective to maintain its value between syst 18 objective to maintain its value between system resets.
19 19
20 properties: 20 properties:
21 compatible: 21 compatible:
22 items: 22 items:
23 - const: fsl,imx7ulp-sim 23 - const: fsl,imx7ulp-sim
24 - const: syscon 24 - const: syscon
25 25
26 reg: 26 reg:
27 maxItems: 1 27 maxItems: 1
28 28
29 required: 29 required:
30 - compatible 30 - compatible
31 - reg 31 - reg
32 32
33 additionalProperties: false 33 additionalProperties: false
34 34
35 examples: 35 examples:
36 - | 36 - |
37 sim@410a3000 { 37 sim@410a3000 {
38 compatible = "fsl,imx7ulp-sim", "sysco 38 compatible = "fsl,imx7ulp-sim", "syscon";
39 reg = <0x410a3000 0x1000>; 39 reg = <0x410a3000 0x1000>;
40 }; 40 };
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