1 Synaptics SoC Device Tree Bindings 1 Synaptics SoC Device Tree Bindings
2 2
3 According to https://www.synaptics.com/company 3 According to https://www.synaptics.com/company/news/conexant-marvell
4 Synaptics has acquired the Multimedia Solution 4 Synaptics has acquired the Multimedia Solutions Business of Marvell, so
5 berlin SoCs are now Synaptics' SoCs now. 5 berlin SoCs are now Synaptics' SoCs now.
6 6
7 ---------------------------------------------- 7 ---------------------------------------------------------------
8 8
>> 9 Work in progress statement:
>> 10
>> 11 Device tree files and bindings applying to Marvell Berlin SoCs and boards are
>> 12 considered "unstable". Any Marvell Berlin device tree binding may change at any
>> 13 time. Be sure to use a device tree binary and a kernel image generated from the
>> 14 same source tree.
>> 15
>> 16 Please refer to Documentation/devicetree/bindings/ABI.rst for a definition of a
>> 17 stable binding/ABI.
>> 18
>> 19 ---------------------------------------------------------------
>> 20
>> 21 Boards with the Synaptics AS370 SoC shall have the following properties:
>> 22 Required root node property:
>> 23 compatible: "syna,as370"
>> 24
9 Boards with a SoC of the Marvell Berlin family 25 Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
10 shall have the following properties: 26 shall have the following properties:
11 27
12 * Required root node properties: 28 * Required root node properties:
13 compatible: must contain "marvell,berlin" 29 compatible: must contain "marvell,berlin"
14 30
15 In addition, the above compatible shall be ext 31 In addition, the above compatible shall be extended with the specific
16 SoC and board used. Currently known SoC compat 32 SoC and board used. Currently known SoC compatibles are:
17 "marvell,berlin2" for Marvell Armada 33 "marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100),
18 "marvell,berlin2cd" for Marvell Armada 34 "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
19 "marvell,berlin2ct" for Marvell Armada 35 "marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????)
20 "marvell,berlin2q" for Marvell Armada 36 "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
21 "marvell,berlin3" for Marvell Armada 37 "marvell,berlin3" for Marvell Armada ? (BG3, 88DE????)
22 38
23 * Example: 39 * Example:
24 40
25 / { 41 / {
26 model = "Sony NSZ-GS7"; 42 model = "Sony NSZ-GS7";
27 compatible = "sony,nsz-gs7", "marvell, 43 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
28 44
29 ... 45 ...
30 } 46 }
31 47
32 * Marvell Berlin CPU control bindings 48 * Marvell Berlin CPU control bindings
33 49
34 CPU control register allows various operations 50 CPU control register allows various operations on CPUs, like resetting them
35 independently. 51 independently.
36 52
37 Required properties: 53 Required properties:
38 - compatible: should be "marvell,berlin-cpu-ct 54 - compatible: should be "marvell,berlin-cpu-ctrl"
39 - reg: address and length of the register set 55 - reg: address and length of the register set
40 56
41 Example: 57 Example:
42 58
43 cpu-ctrl@f7dd0000 { 59 cpu-ctrl@f7dd0000 {
44 compatible = "marvell,berlin-cpu-ctrl" 60 compatible = "marvell,berlin-cpu-ctrl";
45 reg = <0xf7dd0000 0x10000>; 61 reg = <0xf7dd0000 0x10000>;
46 }; 62 };
47 63
48 * Marvell Berlin2 chip control binding 64 * Marvell Berlin2 chip control binding
49 65
50 Marvell Berlin SoCs have a chip control regist 66 Marvell Berlin SoCs have a chip control register set providing several
51 individual registers dealing with pinmux, padm 67 individual registers dealing with pinmux, padmux, clock, reset, and secondary
52 CPU boot address. Unfortunately, the individua 68 CPU boot address. Unfortunately, the individual registers are spread among the
53 chip control registers, so there should be a s 69 chip control registers, so there should be a single DT node only providing the
54 different functions which are described below. 70 different functions which are described below.
55 71
56 Required properties: 72 Required properties:
57 - compatible: 73 - compatible:
58 * the first and second values must be: 74 * the first and second values must be:
59 "simple-mfd", "syscon" 75 "simple-mfd", "syscon"
60 - reg: address and length of following registe 76 - reg: address and length of following register sets for
61 BG2/BG2CD: chip control register set 77 BG2/BG2CD: chip control register set
62 BG2Q: chip control register set and cpu pll 78 BG2Q: chip control register set and cpu pll registers
63 79
64 * Marvell Berlin2 system control binding 80 * Marvell Berlin2 system control binding
65 81
66 Marvell Berlin SoCs have a system control regi 82 Marvell Berlin SoCs have a system control register set providing several
67 individual registers dealing with pinmux, padm 83 individual registers dealing with pinmux, padmux, and reset.
68 84
69 Required properties: 85 Required properties:
70 - compatible: 86 - compatible:
71 * the first and second values must be: 87 * the first and second values must be:
72 "simple-mfd", "syscon" 88 "simple-mfd", "syscon"
73 - reg: address and length of the system contro 89 - reg: address and length of the system control register set
74 90
75 Example: 91 Example:
76 92
77 chip: chip-control@ea0000 { 93 chip: chip-control@ea0000 {
78 compatible = "simple-mfd", "syscon"; 94 compatible = "simple-mfd", "syscon";
79 reg = <0xea0000 0x400>; 95 reg = <0xea0000 0x400>;
80 96
81 /* sub-device nodes */ 97 /* sub-device nodes */
82 }; 98 };
83 99
84 sysctrl: system-controller@d000 { 100 sysctrl: system-controller@d000 {
85 compatible = "simple-mfd", "syscon"; 101 compatible = "simple-mfd", "syscon";
86 reg = <0xd000 0x100>; 102 reg = <0xd000 0x100>;
87 103
88 /* sub-device nodes */ 104 /* sub-device nodes */
89 }; 105 };
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