1 # SPDX-License-Identifier: (GPL-2.0-only OR BS
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/ata/faraday
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Faraday Technology FTIDE010 PATA contro
8
9 maintainers:
10 - Linus Walleij <linus.walleij@linaro.org>
11
12 description: |
13 This controller is the first Faraday IDE int
14 StorLink SL3512 and SL3516, later known as t
15 platform. The controller can do PIO modes 0
16 (MWDM) modes 0 through 2 and Ultra DMA modes
17
18 On the Gemini platform, this PATA block is a
19 SATA bridge in order to support SATA. This i
20 controller is compulsory on that platform.
21
22 The timing properties are unique per-SoC, no
23
24 properties:
25 compatible:
26 oneOf:
27 - const: faraday,ftide010
28 - items:
29 - const: cortina,gemini-pata
30 - const: faraday,ftide010
31
32 reg:
33 maxItems: 1
34
35 interrupts:
36 maxItems: 1
37
38 clocks:
39 minItems: 1
40
41 clock-names:
42 const: PCLK
43
44 sata:
45 description:
46 phandle to the Gemini PATA to SATA bridg
47 $ref: /schemas/types.yaml#/definitions/pha
48
49 required:
50 - compatible
51 - reg
52 - interrupts
53
54 allOf:
55 - $ref: pata-common.yaml#
56
57 - if:
58 properties:
59 compatible:
60 contains:
61 const: cortina,gemini-pata
62
63 then:
64 required:
65 - sata
66
67 unevaluatedProperties: false
68
69 examples:
70 - |
71 #include <dt-bindings/interrupt-controller
72 #include <dt-bindings/clock/cortina,gemini
73
74 ide@63000000 {
75 compatible = "cortina,gemini-pata", "far
76 reg = <0x63000000 0x100>;
77 interrupts = <4 IRQ_TYPE_EDGE_RISING>;
78 clocks = <&gcc GEMINI_CLK_GATE_IDE>;
79 clock-names = "PCLK";
80 sata = <&sata>;
81 #address-cells = <1>;
82 #size-cells = <0>;
83 ide-port@0 {
84 reg = <0>;
85 };
86 ide-port@1 {
87 reg = <1>;
88 };
89 };
90
91 ...
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