1
2 * Marvell MBus
3
4 Required properties:
5
6 - compatible: Should be set to one of the f
7 marvell,armada370-mbus
8 marvell,armadaxp-mbus
9 marvell,armada375-mbus
10 marvell,armada380-mbus
11 marvell,kirkwood-mbus
12 marvell,dove-mbus
13 marvell,orion5x-88f5281-mbus
14 marvell,orion5x-88f5182-mbus
15 marvell,orion5x-88f5181-mbus
16 marvell,orion5x-88f6183-mbus
17 marvell,mv78xx0-mbus
18
19 - address-cells: Must be '2'. The first cell f
20 the second cell for the addre
21
22 - size-cells: Must be '1'.
23
24 - ranges: Must be set up to provide a p
25 See the examples below.
26
27 - controller: Contains a single phandle ref
28 node. This allows to specify
29 registers that control the MB
30 within the internal register
31
32 Optional properties:
33
34 - pcie-mem-aperture: This optional property
35 the memory region of t
36 If it's defined, it mu
37 size for the address d
38 the PCIe memory region
39
40 - pcie-io-aperture: Just as explained for
41 optional property cont
42 I/O region of the PCIe
43
44 * Marvell MBus controller
45
46 Required properties:
47
48 - compatible: Should be set to "marvell,mbus
49
50 - reg: Device's register space.
51 Two or three entries are expec
52 the first one controls the dev
53 the second one controls the SD
54 the third controls the MBus br
55 marvell,armada370-mbus and mar
56 compatible strings)
57
58 Example:
59
60 soc {
61 compatible = "marvell,armada37
62 #address-cells = <2>;
63 #size-cells = <1>;
64 controller = <&mbusc>;
65 pcie-mem-aperture = <0xe000000
66 pcie-io-aperture = <0xe800000
67
68 internal-regs {
69 compatible = "simple-b
70
71 mbusc: mbus-controller
72 compatible = "
73 reg = <0x20000
74 };
75
76 /* more children ...*/
77 };
78 };
79
80 ** MBus address decoding window specification
81
82 The MBus children address space is comprised o
83 the window ID and the second one for the offse
84 In order to allow to describe valid and non-va
85 following encoding is used:
86
87 0xSIAA0000 0x00oooooo
88
89 Where:
90
91 S = 0x0 for a MBus valid window
92 S = 0xf for a non-valid window (see below)
93
94 If S = 0x0, then:
95
96 I = 4-bit window target ID
97 AA = windpw attribute
98
99 If S = 0xf, then:
100
101 I = don't care
102 AA = 1 for internal register
103
104 Following the above encoding, for each ranges
105 (S = 0x0), an address decoding window is alloc
106 entries for translation that do not correspond
107 are skipped.
108
109 soc {
110 compatible = "marvell,armada37
111 #address-cells = <2>;
112 #size-cells = <1>;
113 controller = <&mbusc>;
114
115 ranges = <0xf0010000 0 0 0xd00
116 0x01e00000 0 0 0xfff
117
118 bootrom {
119 compatible = "marvell,
120 reg = <0x01e00000 0 0x
121 };
122
123 /* other children */
124 ...
125
126 internal-regs {
127 compatible = "simple-b
128 ranges = <0 0xf0010000
129
130 mbusc: mbus-controller
131 compatible = "
132 reg = <0x20000
133 };
134
135 /* more children ...*/
136 };
137 };
138
139 In the shown example, the translation entry in
140 makes the MBus driver create a static decoding
141 given child device. Note that the binding does
142 present. Of course, child nodes are needed to
143
144 Since each window is identified by its target
145 a special macro that can be use to simplify th
146
147 #define MBUS_ID(target,attributes) (((target)
148
149 Using this macro, the above example would be:
150
151 soc {
152 compatible = "marvell,armada37
153 #address-cells = <2>;
154 #size-cells = <1>;
155 controller = <&mbusc>;
156
157 ranges = < MBUS_ID(0xf0, 0x01)
158 MBUS_ID(0x01, 0xe0)
159
160 bootrom {
161 compatible = "marvell,
162 reg = <MBUS_ID(0x01, 0
163 };
164
165 /* other children */
166 ...
167
168 internal-regs {
169 compatible = "simple-b
170 #address-cells = <1>;
171 #size-cells = <1>;
172 ranges = <0 MBUS_ID(0x
173
174 mbusc: mbus-controller
175 compatible = "
176 reg = <0x20000
177 };
178
179 /* other children */
180 ...
181 };
182 };
183
184
185 ** About the window base address
186
187 Remember the MBus controller allows a great de
188 the decoding window base address. When plannin
189 possible to choose any address as the base add
190 a region large enough available, and with the
191
192 Yet in other words: there's nothing preventing
193 of 0xf0000000, or 0xd0000000 for the NOR devic
194 unused.
195
196 ** Window allocation policy
197
198 The mbus-node ranges property defines a set of
199 to be set by the operating system and that are
200 with one another or with the system memory ran
201
202 Each entry in the property refers to exactly o
203 chooses to use a different set of mbus windows
204 translations performed from downstream devices
205
206 The operating system may insert additional mbu
207 with the ones listed in the ranges, e.g. for m
208 As a special case, the internal register windo
209 loader at the address listed in the ranges pro
210 is needed to set up the other windows.
211
212 ** Example
213
214 See the example below, where a more complete d
215
216 soc {
217 compatible = "marvell,armadaxp
218 controller = <&mbusc>;
219
220 ranges = <MBUS_ID(0xf0, 0x01)
221 MBUS_ID(0x01, 0x1d)
222 MBUS_ID(0x01, 0x2f)
223
224 bootrom {
225 compatible = "marvell,
226 reg = <MBUS_ID(0x01, 0
227 };
228
229 devbus-bootcs {
230 ranges = <0 MBUS_ID(0x
231
232 /* NOR */
233 nor {
234 compatible = "
235 reg = <0 0x800
236 bank-width = <
237 };
238 };
239
240 pcie-controller {
241 compatible = "marvell,
242 device_type = "pci";
243
244 #address-cells = <3>;
245 #size-cells = <2>;
246
247 ranges =
248 <0x82000000 0 0
249 0x82000000 0 0
250 0x82000000 0 0
251 0x82000000 0 0
252 0x82000000 0 0
253 0x82000800 0 0
254 0x81000800 0 0
255
256
257 pcie@1,0 {
258 /* Port 0, Lan
259 };
260 };
261
262 internal-regs {
263 compatible = "simple-b
264 #address-cells = <1>;
265 #size-cells = <1>;
266 ranges = <0 MBUS_ID(0x
267
268 mbusc: mbus-controller
269 reg = <0x20000
270 };
271
272 interrupt-controller@2
273 reg = <0x20a00 0
274 };
275 };
276 };
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