1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/allwi 4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mmc-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Allwinner A10 Module 1 Clock !! 7 title: Allwinner A10 Module 1 Clock Device Tree Bindings
8 8
9 maintainers: 9 maintainers:
10 - Chen-Yu Tsai <wens@csie.org> 10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org> 11 - Maxime Ripard <mripard@kernel.org>
12 12
13 deprecated: true 13 deprecated: true
14 14
15 properties: 15 properties:
16 "#clock-cells": 16 "#clock-cells":
17 const: 1 17 const: 1
18 description: > 18 description: >
19 There is three different outputs: the ma 19 There is three different outputs: the main clock, with the ID 0,
20 and the output and sample clocks, with t 20 and the output and sample clocks, with the IDs 1 and 2,
21 respectively. 21 respectively.
22 22
23 compatible: 23 compatible:
24 enum: 24 enum:
25 - allwinner,sun4i-a10-mmc-clk 25 - allwinner,sun4i-a10-mmc-clk
26 - allwinner,sun9i-a80-mmc-clk 26 - allwinner,sun9i-a80-mmc-clk
27 27
28 reg: 28 reg:
29 maxItems: 1 29 maxItems: 1
30 30
31 clocks: 31 clocks:
32 minItems: 2 32 minItems: 2
33 maxItems: 3 33 maxItems: 3
34 description: > 34 description: >
35 The parent order must match the hardware 35 The parent order must match the hardware programming order.
36 36
37 clock-output-names: 37 clock-output-names:
38 maxItems: 3 38 maxItems: 3
39 39
40 required: 40 required:
41 - "#clock-cells" 41 - "#clock-cells"
42 - compatible 42 - compatible
43 - reg 43 - reg
44 - clocks 44 - clocks
45 - clock-output-names 45 - clock-output-names
46 46
47 additionalProperties: false 47 additionalProperties: false
48 48
49 if: 49 if:
50 properties: 50 properties:
51 compatible: 51 compatible:
52 contains: 52 contains:
53 const: allwinner,sun4i-a10-mmc-clk 53 const: allwinner,sun4i-a10-mmc-clk
54 54
55 then: 55 then:
56 properties: 56 properties:
57 clocks: 57 clocks:
58 maxItems: 3 58 maxItems: 3
59 59
60 else: 60 else:
61 properties: 61 properties:
62 clocks: 62 clocks:
63 maxItems: 2 63 maxItems: 2
64 64
65 examples: 65 examples:
66 - | 66 - |
67 clk@1c20088 { 67 clk@1c20088 {
68 #clock-cells = <1>; 68 #clock-cells = <1>;
69 compatible = "allwinner,sun4i-a10-mmc- 69 compatible = "allwinner,sun4i-a10-mmc-clk";
70 reg = <0x01c20088 0x4>; 70 reg = <0x01c20088 0x4>;
71 clocks = <&osc24M>, <&pll6 1>, <&pll5 71 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
72 clock-output-names = "mmc0", 72 clock-output-names = "mmc0",
73 "mmc0_output", 73 "mmc0_output",
74 "mmc0_sample"; 74 "mmc0_sample";
75 }; 75 };
76 76
77 - | 77 - |
78 clk@6000410 { 78 clk@6000410 {
79 #clock-cells = <1>; 79 #clock-cells = <1>;
80 compatible = "allwinner,sun9i-a80-mmc- 80 compatible = "allwinner,sun9i-a80-mmc-clk";
81 reg = <0x06000410 0x4>; 81 reg = <0x06000410 0x4>;
82 clocks = <&osc24M>, <&pll4>; 82 clocks = <&osc24M>, <&pll4>;
83 clock-output-names = "mmc0", "mmc0_out 83 clock-output-names = "mmc0", "mmc0_output",
84 "mmc0_sample"; 84 "mmc0_sample";
85 }; 85 };
86 86
87 ... 87 ...
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