1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/allwi 4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Allwinner A10 TCON Channel 0 Clock !! 7 title: Allwinner A10 TCON Channel 0 Clock Device Tree Bindings
8 8
9 maintainers: 9 maintainers:
10 - Chen-Yu Tsai <wens@csie.org> 10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org> 11 - Maxime Ripard <mripard@kernel.org>
12 12
13 deprecated: true 13 deprecated: true
14 14
15 properties: 15 properties:
16 "#clock-cells": 16 "#clock-cells":
17 const: 0 17 const: 0
18 18
19 "#reset-cells": 19 "#reset-cells":
20 const: 1 20 const: 1
21 21
22 compatible: 22 compatible:
23 enum: 23 enum:
24 - allwinner,sun4i-a10-tcon-ch0-clk 24 - allwinner,sun4i-a10-tcon-ch0-clk
25 - allwinner,sun4i-a10-tcon-ch1-clk 25 - allwinner,sun4i-a10-tcon-ch1-clk
26 26
27 reg: 27 reg:
28 maxItems: 1 28 maxItems: 1
29 29
30 clocks: 30 clocks:
31 maxItems: 4 31 maxItems: 4
32 description: > 32 description: >
33 The parent order must match the hardware 33 The parent order must match the hardware programming order.
34 34
35 clock-output-names: 35 clock-output-names:
36 maxItems: 1 36 maxItems: 1
37 37
38 required: 38 required:
39 - "#clock-cells" 39 - "#clock-cells"
40 - compatible 40 - compatible
41 - reg 41 - reg
42 - clocks 42 - clocks
43 - clock-output-names 43 - clock-output-names
44 44
45 if: 45 if:
46 properties: 46 properties:
47 compatible: 47 compatible:
48 contains: 48 contains:
49 const: allwinner,sun4i-a10-tcon-ch0-cl 49 const: allwinner,sun4i-a10-tcon-ch0-clk
50 50
51 then: 51 then:
52 required: 52 required:
53 - "#reset-cells" 53 - "#reset-cells"
54 54
55 additionalProperties: false 55 additionalProperties: false
56 56
57 examples: 57 examples:
58 - | 58 - |
59 clk@1c20118 { 59 clk@1c20118 {
60 #clock-cells = <0>; 60 #clock-cells = <0>;
61 #reset-cells = <1>; 61 #reset-cells = <1>;
62 compatible = "allwinner,sun4i-a10-tcon 62 compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
63 reg = <0x01c20118 0x4>; 63 reg = <0x01c20118 0x4>;
64 clocks = <&pll3>, <&pll7>, <&pll3x2>, 64 clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
65 clock-output-names = "tcon-ch0-sclk"; 65 clock-output-names = "tcon-ch0-sclk";
66 }; 66 };
67 67
68 - | 68 - |
69 clk@1c2012c { 69 clk@1c2012c {
70 #clock-cells = <0>; 70 #clock-cells = <0>;
71 compatible = "allwinner,sun4i-a10-tcon 71 compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
72 reg = <0x01c2012c 0x4>; 72 reg = <0x01c2012c 0x4>;
73 clocks = <&pll3>, <&pll7>, <&pll3x2>, 73 clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
74 clock-output-names = "tcon-ch1-sclk"; 74 clock-output-names = "tcon-ch1-sclk";
75 }; 75 };
76 76
77 ... 77 ...
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