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Linux/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml

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Diff markup

Differences between /Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml (Version linux-6.12-rc7) and /Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml (Version linux-5.10.229)


  1 # SPDX-License-Identifier: GPL-2.0+                 1 # SPDX-License-Identifier: GPL-2.0+
  2 %YAML 1.2                                           2 %YAML 1.2
  3 ---                                                 3 ---
  4 $id: http://devicetree.org/schemas/clock/allwi      4 $id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml#
  5 $schema: http://devicetree.org/meta-schemas/co      5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6                                                     6 
  7 title: Allwinner A83t Display Engine 2/3 Clock !!   7 title: Allwinner A83t Display Engine 2/3 Clock Controller Device Tree Bindings
  8                                                     8 
  9 maintainers:                                        9 maintainers:
 10   - Chen-Yu Tsai <wens@csie.org>                    10   - Chen-Yu Tsai <wens@csie.org>
 11   - Maxime Ripard <mripard@kernel.org>              11   - Maxime Ripard <mripard@kernel.org>
 12                                                    12 
 13 properties:                                        13 properties:
 14   "#clock-cells":                                  14   "#clock-cells":
 15     const: 1                                       15     const: 1
 16                                                    16 
 17   "#reset-cells":                                  17   "#reset-cells":
 18     const: 1                                       18     const: 1
 19                                                    19 
 20   compatible:                                      20   compatible:
 21     oneOf:                                         21     oneOf:
 22       - const: allwinner,sun8i-a83t-de2-clk        22       - const: allwinner,sun8i-a83t-de2-clk
 23       - const: allwinner,sun8i-h3-de2-clk          23       - const: allwinner,sun8i-h3-de2-clk
 24       - const: allwinner,sun8i-v3s-de2-clk         24       - const: allwinner,sun8i-v3s-de2-clk
 25       - const: allwinner,sun50i-a64-de2-clk        25       - const: allwinner,sun50i-a64-de2-clk
 26       - const: allwinner,sun50i-h5-de2-clk         26       - const: allwinner,sun50i-h5-de2-clk
 27       - const: allwinner,sun50i-h6-de3-clk     !!  27       - const: allwinner,sun50i-h6-de2-clk
 28       - items:                                     28       - items:
 29           - const: allwinner,sun8i-r40-de2-clk     29           - const: allwinner,sun8i-r40-de2-clk
 30           - const: allwinner,sun8i-h3-de2-clk      30           - const: allwinner,sun8i-h3-de2-clk
 31       - items:                                 << 
 32           - const: allwinner,sun20i-d1-de2-clk << 
 33           - const: allwinner,sun50i-h5-de2-clk << 
 34                                                    31 
 35   reg:                                             32   reg:
 36     maxItems: 1                                    33     maxItems: 1
 37                                                    34 
 38   clocks:                                          35   clocks:
 39     items:                                         36     items:
 40       - description: Bus Clock                     37       - description: Bus Clock
 41       - description: Module Clock                  38       - description: Module Clock
 42                                                    39 
 43   clock-names:                                     40   clock-names:
 44     items:                                         41     items:
 45       - const: bus                                 42       - const: bus
 46       - const: mod                                 43       - const: mod
 47                                                    44 
 48   resets:                                          45   resets:
 49     maxItems: 1                                    46     maxItems: 1
 50                                                    47 
 51 required:                                          48 required:
 52   - "#clock-cells"                                 49   - "#clock-cells"
 53   - "#reset-cells"                                 50   - "#reset-cells"
 54   - compatible                                     51   - compatible
 55   - reg                                            52   - reg
 56   - clocks                                         53   - clocks
 57   - clock-names                                    54   - clock-names
 58   - resets                                         55   - resets
 59                                                    56 
 60 additionalProperties: false                        57 additionalProperties: false
 61                                                    58 
 62 examples:                                          59 examples:
 63   - |                                              60   - |
 64     #include <dt-bindings/clock/sun8i-h3-ccu.h     61     #include <dt-bindings/clock/sun8i-h3-ccu.h>
 65     #include <dt-bindings/reset/sun8i-h3-ccu.h     62     #include <dt-bindings/reset/sun8i-h3-ccu.h>
 66                                                    63 
 67     de2_clocks: clock@1000000 {                    64     de2_clocks: clock@1000000 {
 68         compatible = "allwinner,sun8i-h3-de2-c     65         compatible = "allwinner,sun8i-h3-de2-clk";
 69         reg = <0x01000000 0x100000>;               66         reg = <0x01000000 0x100000>;
 70         clocks = <&ccu CLK_BUS_DE>,                67         clocks = <&ccu CLK_BUS_DE>,
 71                  <&ccu CLK_DE>;                    68                  <&ccu CLK_DE>;
 72         clock-names = "bus",                       69         clock-names = "bus",
 73                       "mod";                       70                       "mod";
 74         resets = <&ccu RST_BUS_DE>;                71         resets = <&ccu RST_BUS_DE>;
 75         #clock-cells = <1>;                        72         #clock-cells = <1>;
 76         #reset-cells = <1>;                        73         #reset-cells = <1>;
 77     };                                             74     };
 78                                                    75 
 79 ...                                                76 ...
                                                      

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