1 # SPDX-License-Identifier: (GPL-2.0-only OR BS
2 # Copyright (C) 2022-2023 Amlogic, Inc. All ri
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/clock/amlog
6 $schema: http://devicetree.org/meta-schemas/co
7
8 title: Amlogic C3 series PLL Clock Controller
9
10 maintainers:
11 - Neil Armstrong <neil.armstrong@linaro.org>
12 - Jerome Brunet <jbrunet@baylibre.com>
13 - Chuan Liu <chuan.liu@amlogic.com>
14 - Xianwei Zhao <xianwei.zhao@amlogic.com>
15
16 properties:
17 compatible:
18 const: amlogic,c3-pll-clkc
19
20 reg:
21 maxItems: 1
22
23 clocks:
24 items:
25 - description: input top pll
26 - description: input mclk pll
27 - description: input fix pll
28
29 clock-names:
30 items:
31 - const: top
32 - const: mclk
33 - const: fix
34
35 "#clock-cells":
36 const: 1
37
38 required:
39 - compatible
40 - reg
41 - clocks
42 - clock-names
43 - "#clock-cells"
44
45 additionalProperties: false
46
47 examples:
48 - |
49 apb {
50 #address-cells = <2>;
51 #size-cells = <2>;
52
53 clock-controller@8000 {
54 compatible = "amlogic,c3-pll-clkc"
55 reg = <0x0 0x8000 0x0 0x1a4>;
56 clocks = <&scmi_clk 2>,
57 <&scmi_clk 5>,
58 <&scmi_clk 12>;
59 clock-names = "top", "mclk", "fix"
60 #clock-cells = <1>;
61 };
62 };
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