1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/cirru 4 $id: http://devicetree.org/schemas/clock/cirrus,cs2000-cp.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: CIRRUS LOGIC Fractional-N Clock Synthes !! 7 title: Binding CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier
8 8
9 maintainers: 9 maintainers:
10 - Kuninori Morimoto <kuninori.morimoto.gx@ren 10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
11 11
12 description: | 12 description: |
13 The CS2000-CP is an extremely versatile syst 13 The CS2000-CP is an extremely versatile system clocking device that
14 utilizes a programmable phase lock loop. 14 utilizes a programmable phase lock loop.
15 15
16 Link: https://www.cirrus.com/products/cs2000 16 Link: https://www.cirrus.com/products/cs2000/
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 enum: 20 enum:
21 - cirrus,cs2000-cp 21 - cirrus,cs2000-cp
22 22
23 clocks: 23 clocks:
24 description: 24 description:
25 Common clock binding for CLK_IN, XTI/REF 25 Common clock binding for CLK_IN, XTI/REF_CLK
>> 26 minItems: 2
26 maxItems: 2 27 maxItems: 2
27 28
28 clock-names: 29 clock-names:
29 items: 30 items:
30 - const: clk_in 31 - const: clk_in
31 - const: ref_clk 32 - const: ref_clk
32 33
33 '#clock-cells': 34 '#clock-cells':
34 const: 0 35 const: 0
35 36
36 reg: 37 reg:
37 maxItems: 1 38 maxItems: 1
38 39
39 cirrus,aux-output-source: 40 cirrus,aux-output-source:
40 description: 41 description:
41 Specifies the function of the auxiliary 42 Specifies the function of the auxiliary clock output pin
42 $ref: /schemas/types.yaml#/definitions/uin 43 $ref: /schemas/types.yaml#/definitions/uint32
43 enum: 44 enum:
44 - 0 # CS2000CP_AUX_OUTPUT_REF_CLK: ref_ 45 - 0 # CS2000CP_AUX_OUTPUT_REF_CLK: ref_clk input
45 - 1 # CS2000CP_AUX_OUTPUT_CLK_IN: clk_ 46 - 1 # CS2000CP_AUX_OUTPUT_CLK_IN: clk_in input
46 - 2 # CS2000CP_AUX_OUTPUT_CLK_OUT: clk_ 47 - 2 # CS2000CP_AUX_OUTPUT_CLK_OUT: clk_out output
47 - 3 # CS2000CP_AUX_OUTPUT_PLL_LOCK: pll 48 - 3 # CS2000CP_AUX_OUTPUT_PLL_LOCK: pll lock status
48 default: 0 49 default: 0
49 50
50 cirrus,clock-skip: 51 cirrus,clock-skip:
51 description: 52 description:
52 This mode allows the PLL to maintain loc 53 This mode allows the PLL to maintain lock even when CLK_IN
53 has missing pulses for up to 20 ms. 54 has missing pulses for up to 20 ms.
54 $ref: /schemas/types.yaml#/definitions/fla 55 $ref: /schemas/types.yaml#/definitions/flag
55 56
56 cirrus,dynamic-mode: 57 cirrus,dynamic-mode:
57 description: 58 description:
58 In dynamic mode, the CLK_IN input is use 59 In dynamic mode, the CLK_IN input is used to drive the
59 digital PLL of the silicon. 60 digital PLL of the silicon.
60 If not given, the static mode shall be u 61 If not given, the static mode shall be used to derive the
61 output signal directly from the REF_CLK 62 output signal directly from the REF_CLK input.
62 $ref: /schemas/types.yaml#/definitions/fla 63 $ref: /schemas/types.yaml#/definitions/flag
63 64
64 required: 65 required:
65 - compatible 66 - compatible
66 - reg 67 - reg
67 - clocks 68 - clocks
68 - clock-names 69 - clock-names
69 - '#clock-cells' 70 - '#clock-cells'
70 71
71 additionalProperties: false 72 additionalProperties: false
72 73
73 examples: 74 examples:
74 - | 75 - |
75 #include <dt-bindings/clock/cirrus,cs2000- 76 #include <dt-bindings/clock/cirrus,cs2000-cp.h>
76 77
77 i2c@0 { 78 i2c@0 {
78 reg = <0x0 0x100>; 79 reg = <0x0 0x100>;
79 #address-cells = <1>; 80 #address-cells = <1>;
80 #size-cells = <0>; 81 #size-cells = <0>;
81 82
82 clock-controller@4f { 83 clock-controller@4f {
83 #clock-cells = <0>; 84 #clock-cells = <0>;
84 compatible = "cirrus,cs2000-cp"; 85 compatible = "cirrus,cs2000-cp";
85 reg = <0x4f>; 86 reg = <0x4f>;
86 clocks = <&rcar_sound 0>, <&x12_clk>; 87 clocks = <&rcar_sound 0>, <&x12_clk>;
87 clock-names = "clk_in", "ref_clk"; 88 clock-names = "clk_in", "ref_clk";
88 cirrus,aux-output-source = <CS2000CP_A 89 cirrus,aux-output-source = <CS2000CP_AUX_OUTPUT_CLK_OUT>;
89 }; 90 };
90 }; 91 };
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