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Linux/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml

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Diff markup

Differences between /Documentation/devicetree/bindings/clock/imx6sx-clock.yaml (Architecture mips) and /Documentation/devicetree/bindings/clock/imx6sx-clock.yaml (Architecture sparc)


  1 # SPDX-License-Identifier: (GPL-2.0-only OR BS      1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2                                           2 %YAML 1.2
  3 ---                                                 3 ---
  4 $id: http://devicetree.org/schemas/clock/imx6s      4 $id: http://devicetree.org/schemas/clock/imx6sx-clock.yaml#
  5 $schema: http://devicetree.org/meta-schemas/co      5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6                                                     6 
  7 title: Freescale i.MX6 SoloX Clock Controller       7 title: Freescale i.MX6 SoloX Clock Controller
  8                                                     8 
  9 maintainers:                                        9 maintainers:
 10   - Abel Vesa <abelvesa@kernel.org>                 10   - Abel Vesa <abelvesa@kernel.org>
 11   - Peng Fan <peng.fan@nxp.com>                     11   - Peng Fan <peng.fan@nxp.com>
 12                                                    12 
 13 properties:                                        13 properties:
 14   compatible:                                      14   compatible:
 15     const: fsl,imx6sx-ccm                          15     const: fsl,imx6sx-ccm
 16                                                    16 
 17   reg:                                             17   reg:
 18     maxItems: 1                                    18     maxItems: 1
 19                                                    19 
 20   interrupts:                                      20   interrupts:
 21     description: CCM provides 2 interrupt requ     21     description: CCM provides 2 interrupt requests, request 1 is to generate
 22       interrupt for frequency or mux change, r     22       interrupt for frequency or mux change, request 2 is to generate
 23       interrupt for oscillator read or PLL loc     23       interrupt for oscillator read or PLL lock.
 24     items:                                         24     items:
 25       - description: CCM interrupt request 1       25       - description: CCM interrupt request 1
 26       - description: CCM interrupt request 2       26       - description: CCM interrupt request 2
 27                                                    27 
 28   '#clock-cells':                                  28   '#clock-cells':
 29     const: 1                                       29     const: 1
 30                                                    30 
 31   clocks:                                          31   clocks:
 32     items:                                         32     items:
 33       - description: 32k osc                       33       - description: 32k osc
 34       - description: 24m osc                       34       - description: 24m osc
 35       - description: ipp_di0 clock input           35       - description: ipp_di0 clock input
 36       - description: ipp_di1 clock input           36       - description: ipp_di1 clock input
 37       - description: anaclk1 clock input           37       - description: anaclk1 clock input
 38       - description: anaclk2 clock input           38       - description: anaclk2 clock input
 39                                                    39 
 40   clock-names:                                     40   clock-names:
 41     items:                                         41     items:
 42       - const: ckil                                42       - const: ckil
 43       - const: osc                                 43       - const: osc
 44       - const: ipp_di0                             44       - const: ipp_di0
 45       - const: ipp_di1                             45       - const: ipp_di1
 46       - const: anaclk1                             46       - const: anaclk1
 47       - const: anaclk2                             47       - const: anaclk2
 48                                                    48 
 49 required:                                          49 required:
 50   - compatible                                     50   - compatible
 51   - reg                                            51   - reg
 52   - interrupts                                     52   - interrupts
 53   - '#clock-cells'                                 53   - '#clock-cells'
 54   - clocks                                         54   - clocks
 55   - clock-names                                    55   - clock-names
 56                                                    56 
 57 additionalProperties: false                        57 additionalProperties: false
 58                                                    58 
 59 examples:                                          59 examples:
 60   # Clock Control Module node:                     60   # Clock Control Module node:
 61   - |                                              61   - |
 62     #include <dt-bindings/interrupt-controller     62     #include <dt-bindings/interrupt-controller/arm-gic.h>
 63                                                    63 
 64     clock-controller@20c4000 {                     64     clock-controller@20c4000 {
 65         compatible = "fsl,imx6sx-ccm";             65         compatible = "fsl,imx6sx-ccm";
 66         reg = <0x020c4000 0x4000>;                 66         reg = <0x020c4000 0x4000>;
 67         interrupts = <GIC_SPI 87 IRQ_TYPE_LEVE     67         interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
 68                      <GIC_SPI 88 IRQ_TYPE_LEVE     68                      <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
 69         #clock-cells = <1>;                        69         #clock-cells = <1>;
 70         clocks = <&ckil>, <&osc>, <&ipp_di0>,      70         clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
 71         clock-names = "ckil", "osc", "ipp_di0"     71         clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
 72     };                                             72     };
                                                      

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