1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/imx8m 4 $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: NXP i.MX8M Family Clock Control Module 7 title: NXP i.MX8M Family Clock Control Module
8 8
9 maintainers: 9 maintainers:
10 - Abel Vesa <abelvesa@kernel.org> !! 10 - Anson Huang <Anson.Huang@nxp.com>
11 - Peng Fan <peng.fan@nxp.com> <<
12 11
13 description: | 12 description: |
14 NXP i.MX8M Mini/Nano/Plus/Quad clock control 13 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
15 controller, which generates and supplies to 14 controller, which generates and supplies to all modules.
16 15
17 properties: 16 properties:
18 compatible: 17 compatible:
19 enum: 18 enum:
20 - fsl,imx8mm-ccm 19 - fsl,imx8mm-ccm
21 - fsl,imx8mn-ccm 20 - fsl,imx8mn-ccm
22 - fsl,imx8mp-ccm 21 - fsl,imx8mp-ccm
23 - fsl,imx8mq-ccm 22 - fsl,imx8mq-ccm
24 23
25 reg: 24 reg:
26 maxItems: 1 25 maxItems: 1
27 <<
28 interrupts: <<
29 maxItems: 2 <<
30 26
31 clocks: 27 clocks:
32 minItems: 6 28 minItems: 6
33 maxItems: 7 29 maxItems: 7
34 30
35 clock-names: 31 clock-names:
36 minItems: 6 32 minItems: 6
37 maxItems: 7 33 maxItems: 7
38 34
39 '#clock-cells': 35 '#clock-cells':
40 const: 1 36 const: 1
41 description: 37 description:
42 The clock consumer should specify the de 38 The clock consumer should specify the desired clock by having the clock
43 ID in its "clocks" phandle cell. See inc 39 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
44 for the full list of i.MX8M clock IDs. 40 for the full list of i.MX8M clock IDs.
45 41
46 required: 42 required:
47 - compatible 43 - compatible
48 - reg 44 - reg
49 - clocks 45 - clocks
50 - clock-names 46 - clock-names
51 - '#clock-cells' 47 - '#clock-cells'
52 48
53 allOf: 49 allOf:
54 - if: 50 - if:
55 properties: 51 properties:
56 compatible: 52 compatible:
57 contains: 53 contains:
58 const: fsl,imx8mq-ccm 54 const: fsl,imx8mq-ccm
59 then: 55 then:
60 properties: 56 properties:
61 clocks: 57 clocks:
62 items: 58 items:
63 - description: 32k osc 59 - description: 32k osc
64 - description: 25m osc 60 - description: 25m osc
65 - description: 27m osc 61 - description: 27m osc
66 - description: ext1 clock input 62 - description: ext1 clock input
67 - description: ext2 clock input 63 - description: ext2 clock input
68 - description: ext3 clock input 64 - description: ext3 clock input
69 - description: ext4 clock input 65 - description: ext4 clock input
70 clock-names: 66 clock-names:
71 items: 67 items:
72 - const: ckil 68 - const: ckil
73 - const: osc_25m 69 - const: osc_25m
74 - const: osc_27m 70 - const: osc_27m
75 - const: clk_ext1 71 - const: clk_ext1
76 - const: clk_ext2 72 - const: clk_ext2
77 - const: clk_ext3 73 - const: clk_ext3
78 - const: clk_ext4 74 - const: clk_ext4
79 else: 75 else:
80 properties: 76 properties:
81 clocks: 77 clocks:
82 items: 78 items:
83 - description: 32k osc 79 - description: 32k osc
84 - description: 24m osc 80 - description: 24m osc
85 - description: ext1 clock input 81 - description: ext1 clock input
86 - description: ext2 clock input 82 - description: ext2 clock input
87 - description: ext3 clock input 83 - description: ext3 clock input
88 - description: ext4 clock input 84 - description: ext4 clock input
89 85
90 clock-names: 86 clock-names:
91 items: 87 items:
92 - const: osc_32k 88 - const: osc_32k
93 - const: osc_24m 89 - const: osc_24m
94 - const: clk_ext1 90 - const: clk_ext1
95 - const: clk_ext2 91 - const: clk_ext2
96 - const: clk_ext3 92 - const: clk_ext3
97 - const: clk_ext4 93 - const: clk_ext4
98 94
99 additionalProperties: false 95 additionalProperties: false
100 96
101 examples: 97 examples:
102 # Clock Control Module node: 98 # Clock Control Module node:
103 - | 99 - |
104 clock-controller@30380000 { 100 clock-controller@30380000 {
105 compatible = "fsl,imx8mm-ccm"; 101 compatible = "fsl,imx8mm-ccm";
106 reg = <0x30380000 0x10000>; 102 reg = <0x30380000 0x10000>;
107 #clock-cells = <1>; 103 #clock-cells = <1>;
108 clocks = <&osc_32k>, <&osc_24m>, <&clk 104 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
109 <&clk_ext3>, <&clk_ext4>; 105 <&clk_ext3>, <&clk_ext4>;
110 clock-names = "osc_32k", "osc_24m", "c 106 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
111 "clk_ext3", "clk_ext4"; 107 "clk_ext3", "clk_ext4";
112 }; 108 };
113 109
114 - | 110 - |
115 clock-controller@30380000 { 111 clock-controller@30380000 {
116 compatible = "fsl,imx8mq-ccm"; 112 compatible = "fsl,imx8mq-ccm";
117 reg = <0x30380000 0x10000>; 113 reg = <0x30380000 0x10000>;
118 #clock-cells = <1>; 114 #clock-cells = <1>;
119 clocks = <&ckil>, <&osc_25m>, <&osc_27 115 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
120 <&clk_ext2>, <&clk_ext3>, <&c 116 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
121 clock-names = "ckil", "osc_25m", "osc_ 117 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
122 "clk_ext2", "clk_ext3", 118 "clk_ext2", "clk_ext3", "clk_ext4";
123 }; 119 };
124 120
125 ... 121 ...
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