1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/imx8m 4 $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: NXP i.MX8M Family Clock Control Module 7 title: NXP i.MX8M Family Clock Control Module
8 8
9 maintainers: 9 maintainers:
10 - Abel Vesa <abelvesa@kernel.org> !! 10 - Anson Huang <Anson.Huang@nxp.com>
11 - Peng Fan <peng.fan@nxp.com> <<
12 11
13 description: | 12 description: |
14 NXP i.MX8M Mini/Nano/Plus/Quad clock control 13 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
15 controller, which generates and supplies to 14 controller, which generates and supplies to all modules.
16 15
17 properties: 16 properties:
18 compatible: 17 compatible:
19 enum: 18 enum:
20 - fsl,imx8mm-ccm 19 - fsl,imx8mm-ccm
21 - fsl,imx8mn-ccm 20 - fsl,imx8mn-ccm
22 - fsl,imx8mp-ccm 21 - fsl,imx8mp-ccm
23 - fsl,imx8mq-ccm 22 - fsl,imx8mq-ccm
24 23
25 reg: 24 reg:
26 maxItems: 1 25 maxItems: 1
27 26
28 interrupts: 27 interrupts:
29 maxItems: 2 28 maxItems: 2
30 29
31 clocks: 30 clocks:
32 minItems: 6 31 minItems: 6
33 maxItems: 7 32 maxItems: 7
34 33
35 clock-names: 34 clock-names:
36 minItems: 6 35 minItems: 6
37 maxItems: 7 36 maxItems: 7
38 37
39 '#clock-cells': 38 '#clock-cells':
40 const: 1 39 const: 1
41 description: 40 description:
42 The clock consumer should specify the de 41 The clock consumer should specify the desired clock by having the clock
43 ID in its "clocks" phandle cell. See inc 42 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
44 for the full list of i.MX8M clock IDs. 43 for the full list of i.MX8M clock IDs.
45 44
46 required: 45 required:
47 - compatible 46 - compatible
48 - reg 47 - reg
49 - clocks 48 - clocks
50 - clock-names 49 - clock-names
51 - '#clock-cells' 50 - '#clock-cells'
52 51
53 allOf: 52 allOf:
54 - if: 53 - if:
55 properties: 54 properties:
56 compatible: 55 compatible:
57 contains: 56 contains:
58 const: fsl,imx8mq-ccm 57 const: fsl,imx8mq-ccm
59 then: 58 then:
60 properties: 59 properties:
61 clocks: 60 clocks:
62 items: 61 items:
63 - description: 32k osc 62 - description: 32k osc
64 - description: 25m osc 63 - description: 25m osc
65 - description: 27m osc 64 - description: 27m osc
66 - description: ext1 clock input 65 - description: ext1 clock input
67 - description: ext2 clock input 66 - description: ext2 clock input
68 - description: ext3 clock input 67 - description: ext3 clock input
69 - description: ext4 clock input 68 - description: ext4 clock input
70 clock-names: 69 clock-names:
71 items: 70 items:
72 - const: ckil 71 - const: ckil
73 - const: osc_25m 72 - const: osc_25m
74 - const: osc_27m 73 - const: osc_27m
75 - const: clk_ext1 74 - const: clk_ext1
76 - const: clk_ext2 75 - const: clk_ext2
77 - const: clk_ext3 76 - const: clk_ext3
78 - const: clk_ext4 77 - const: clk_ext4
79 else: 78 else:
80 properties: 79 properties:
81 clocks: 80 clocks:
82 items: 81 items:
83 - description: 32k osc 82 - description: 32k osc
84 - description: 24m osc 83 - description: 24m osc
85 - description: ext1 clock input 84 - description: ext1 clock input
86 - description: ext2 clock input 85 - description: ext2 clock input
87 - description: ext3 clock input 86 - description: ext3 clock input
88 - description: ext4 clock input 87 - description: ext4 clock input
89 88
90 clock-names: 89 clock-names:
91 items: 90 items:
92 - const: osc_32k 91 - const: osc_32k
93 - const: osc_24m 92 - const: osc_24m
94 - const: clk_ext1 93 - const: clk_ext1
95 - const: clk_ext2 94 - const: clk_ext2
96 - const: clk_ext3 95 - const: clk_ext3
97 - const: clk_ext4 96 - const: clk_ext4
98 97
99 additionalProperties: false 98 additionalProperties: false
100 99
101 examples: 100 examples:
102 # Clock Control Module node: 101 # Clock Control Module node:
103 - | 102 - |
104 clock-controller@30380000 { 103 clock-controller@30380000 {
105 compatible = "fsl,imx8mm-ccm"; 104 compatible = "fsl,imx8mm-ccm";
106 reg = <0x30380000 0x10000>; 105 reg = <0x30380000 0x10000>;
107 #clock-cells = <1>; 106 #clock-cells = <1>;
108 clocks = <&osc_32k>, <&osc_24m>, <&clk 107 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
109 <&clk_ext3>, <&clk_ext4>; 108 <&clk_ext3>, <&clk_ext4>;
110 clock-names = "osc_32k", "osc_24m", "c 109 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
111 "clk_ext3", "clk_ext4"; 110 "clk_ext3", "clk_ext4";
112 }; 111 };
113 112
114 - | 113 - |
115 clock-controller@30380000 { 114 clock-controller@30380000 {
116 compatible = "fsl,imx8mq-ccm"; 115 compatible = "fsl,imx8mq-ccm";
117 reg = <0x30380000 0x10000>; 116 reg = <0x30380000 0x10000>;
118 #clock-cells = <1>; 117 #clock-cells = <1>;
119 clocks = <&ckil>, <&osc_25m>, <&osc_27 118 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
120 <&clk_ext2>, <&clk_ext3>, <&c 119 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
121 clock-names = "ckil", "osc_25m", "osc_ 120 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
122 "clk_ext2", "clk_ext3", 121 "clk_ext2", "clk_ext3", "clk_ext4";
123 }; 122 };
124 123
125 ... 124 ...
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