1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/imx8m 4 $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: NXP i.MX8M Family Clock Control Module 7 title: NXP i.MX8M Family Clock Control Module
8 8
9 maintainers: 9 maintainers:
10 - Abel Vesa <abelvesa@kernel.org> 10 - Abel Vesa <abelvesa@kernel.org>
11 - Peng Fan <peng.fan@nxp.com> 11 - Peng Fan <peng.fan@nxp.com>
12 12
13 description: | 13 description: |
14 NXP i.MX8M Mini/Nano/Plus/Quad clock control 14 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
15 controller, which generates and supplies to 15 controller, which generates and supplies to all modules.
16 16
17 properties: 17 properties:
18 compatible: 18 compatible:
19 enum: 19 enum:
20 - fsl,imx8mm-ccm 20 - fsl,imx8mm-ccm
21 - fsl,imx8mn-ccm 21 - fsl,imx8mn-ccm
22 - fsl,imx8mp-ccm 22 - fsl,imx8mp-ccm
23 - fsl,imx8mq-ccm 23 - fsl,imx8mq-ccm
24 24
25 reg: 25 reg:
26 maxItems: 1 26 maxItems: 1
27 27
28 interrupts: 28 interrupts:
29 maxItems: 2 29 maxItems: 2
30 30
31 clocks: 31 clocks:
32 minItems: 6 32 minItems: 6
33 maxItems: 7 33 maxItems: 7
34 34
35 clock-names: 35 clock-names:
36 minItems: 6 36 minItems: 6
37 maxItems: 7 37 maxItems: 7
38 38
39 '#clock-cells': 39 '#clock-cells':
40 const: 1 40 const: 1
41 description: 41 description:
42 The clock consumer should specify the de 42 The clock consumer should specify the desired clock by having the clock
43 ID in its "clocks" phandle cell. See inc 43 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
44 for the full list of i.MX8M clock IDs. 44 for the full list of i.MX8M clock IDs.
45 45
46 required: 46 required:
47 - compatible 47 - compatible
48 - reg 48 - reg
49 - clocks 49 - clocks
50 - clock-names 50 - clock-names
51 - '#clock-cells' 51 - '#clock-cells'
52 52
53 allOf: 53 allOf:
54 - if: 54 - if:
55 properties: 55 properties:
56 compatible: 56 compatible:
57 contains: 57 contains:
58 const: fsl,imx8mq-ccm 58 const: fsl,imx8mq-ccm
59 then: 59 then:
60 properties: 60 properties:
61 clocks: 61 clocks:
62 items: 62 items:
63 - description: 32k osc 63 - description: 32k osc
64 - description: 25m osc 64 - description: 25m osc
65 - description: 27m osc 65 - description: 27m osc
66 - description: ext1 clock input 66 - description: ext1 clock input
67 - description: ext2 clock input 67 - description: ext2 clock input
68 - description: ext3 clock input 68 - description: ext3 clock input
69 - description: ext4 clock input 69 - description: ext4 clock input
70 clock-names: 70 clock-names:
71 items: 71 items:
72 - const: ckil 72 - const: ckil
73 - const: osc_25m 73 - const: osc_25m
74 - const: osc_27m 74 - const: osc_27m
75 - const: clk_ext1 75 - const: clk_ext1
76 - const: clk_ext2 76 - const: clk_ext2
77 - const: clk_ext3 77 - const: clk_ext3
78 - const: clk_ext4 78 - const: clk_ext4
79 else: 79 else:
80 properties: 80 properties:
81 clocks: 81 clocks:
82 items: 82 items:
83 - description: 32k osc 83 - description: 32k osc
84 - description: 24m osc 84 - description: 24m osc
85 - description: ext1 clock input 85 - description: ext1 clock input
86 - description: ext2 clock input 86 - description: ext2 clock input
87 - description: ext3 clock input 87 - description: ext3 clock input
88 - description: ext4 clock input 88 - description: ext4 clock input
89 89
90 clock-names: 90 clock-names:
91 items: 91 items:
92 - const: osc_32k 92 - const: osc_32k
93 - const: osc_24m 93 - const: osc_24m
94 - const: clk_ext1 94 - const: clk_ext1
95 - const: clk_ext2 95 - const: clk_ext2
96 - const: clk_ext3 96 - const: clk_ext3
97 - const: clk_ext4 97 - const: clk_ext4
98 98
99 additionalProperties: false 99 additionalProperties: false
100 100
101 examples: 101 examples:
102 # Clock Control Module node: 102 # Clock Control Module node:
103 - | 103 - |
104 clock-controller@30380000 { 104 clock-controller@30380000 {
105 compatible = "fsl,imx8mm-ccm"; 105 compatible = "fsl,imx8mm-ccm";
106 reg = <0x30380000 0x10000>; 106 reg = <0x30380000 0x10000>;
107 #clock-cells = <1>; 107 #clock-cells = <1>;
108 clocks = <&osc_32k>, <&osc_24m>, <&clk 108 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
109 <&clk_ext3>, <&clk_ext4>; 109 <&clk_ext3>, <&clk_ext4>;
110 clock-names = "osc_32k", "osc_24m", "c 110 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
111 "clk_ext3", "clk_ext4"; 111 "clk_ext3", "clk_ext4";
112 }; 112 };
113 113
114 - | 114 - |
115 clock-controller@30380000 { 115 clock-controller@30380000 {
116 compatible = "fsl,imx8mq-ccm"; 116 compatible = "fsl,imx8mq-ccm";
117 reg = <0x30380000 0x10000>; 117 reg = <0x30380000 0x10000>;
118 #clock-cells = <1>; 118 #clock-cells = <1>;
119 clocks = <&ckil>, <&osc_25m>, <&osc_27 119 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
120 <&clk_ext2>, <&clk_ext3>, <&c 120 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
121 clock-names = "ckil", "osc_25m", "osc_ 121 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
122 "clk_ext2", "clk_ext3", 122 "clk_ext2", "clk_ext3", "clk_ext4";
123 }; 123 };
124 124
125 ... 125 ...
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