1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/clock/intel 4 $id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: Intel SoCFPGA eASIC N5X platform clock 7 title: Intel SoCFPGA eASIC N5X platform clock controller 8 8 9 maintainers: 9 maintainers: 10 - Dinh Nguyen <dinguyen@kernel.org> 10 - Dinh Nguyen <dinguyen@kernel.org> 11 11 12 description: 12 description: 13 The Intel eASIC N5X Clock controller is an i 13 The Intel eASIC N5X Clock controller is an integrated clock controller, which 14 generates and supplies to all modules. 14 generates and supplies to all modules. 15 15 16 properties: 16 properties: 17 compatible: 17 compatible: 18 const: intel,easic-n5x-clkmgr 18 const: intel,easic-n5x-clkmgr 19 19 20 '#clock-cells': 20 '#clock-cells': 21 const: 1 21 const: 1 22 22 23 reg: 23 reg: 24 maxItems: 1 24 maxItems: 1 25 25 26 clocks: 26 clocks: 27 maxItems: 1 27 maxItems: 1 28 28 29 required: 29 required: 30 - compatible 30 - compatible 31 - reg 31 - reg 32 - clocks 32 - clocks 33 - '#clock-cells' 33 - '#clock-cells' 34 34 35 additionalProperties: false 35 additionalProperties: false 36 36 37 examples: 37 examples: 38 # Clock controller node: 38 # Clock controller node: 39 - | 39 - | 40 clkmgr: clock-controller@ffd10000 { 40 clkmgr: clock-controller@ffd10000 { 41 compatible = "intel,easic-n5x-clkmgr"; 41 compatible = "intel,easic-n5x-clkmgr"; 42 reg = <0xffd10000 0x1000>; 42 reg = <0xffd10000 0x1000>; 43 clocks = <&osc1>; 43 clocks = <&osc1>; 44 #clock-cells = <1>; 44 #clock-cells = <1>; 45 }; 45 }; 46 ... 46 ...
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