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TOMOYO Linux Cross Reference
Linux/Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt

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Diff markup

Differences between /Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt (Architecture ppc) and /Documentation/devicetree/bindings/clock/lpc1850-creg-clk.txt (Architecture mips)


  1 * NXP LPC1850 CREG clocks                           1 * NXP LPC1850 CREG clocks
  2                                                     2 
  3 The NXP LPC18xx/43xx CREG (Configuration Regis      3 The NXP LPC18xx/43xx CREG (Configuration Registers) block contains
  4 control registers for two low speed clocks. On      4 control registers for two low speed clocks. One of the clocks is a
  5 32 kHz oscillator driver with power up/down an      5 32 kHz oscillator driver with power up/down and clock gating. Next
  6 is a fixed divider that creates a 1 kHz clock       6 is a fixed divider that creates a 1 kHz clock from the 32 kHz osc.
  7                                                     7 
  8 These clocks are used by the RTC and the Event      8 These clocks are used by the RTC and the Event Router peripherals.
  9 The 32 kHz can also be routed to other periphe      9 The 32 kHz can also be routed to other peripherals to enable low
 10 power modes.                                       10 power modes.
 11                                                    11 
 12 This binding uses the common clock binding:        12 This binding uses the common clock binding:
 13     Documentation/devicetree/bindings/clock/cl     13     Documentation/devicetree/bindings/clock/clock-bindings.txt
 14                                                    14 
 15 Required properties:                               15 Required properties:
 16 - compatible:                                      16 - compatible:
 17         Should be "nxp,lpc1850-creg-clk"           17         Should be "nxp,lpc1850-creg-clk"
 18 - #clock-cells:                                    18 - #clock-cells:
 19         Shall have value <1>.                      19         Shall have value <1>.
 20 - clocks:                                          20 - clocks:
 21         Shall contain a phandle to the fixed 3     21         Shall contain a phandle to the fixed 32 kHz crystal.
 22                                                    22 
 23 The creg-clk node must be a child of the creg      23 The creg-clk node must be a child of the creg syscon node.
 24                                                    24 
 25 The following clocks are available from the cl     25 The following clocks are available from the clock node.
 26                                                    26 
 27 Clock ID        Name                               27 Clock ID        Name
 28    0             1 kHz clock                       28    0             1 kHz clock
 29    1            32 kHz Oscillator                  29    1            32 kHz Oscillator
 30                                                    30 
 31 Example:                                           31 Example:
 32 soc {                                              32 soc {
 33         creg: syscon@40043000 {                    33         creg: syscon@40043000 {
 34                 compatible = "nxp,lpc1850-creg     34                 compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
 35                 reg = <0x40043000 0x1000>;         35                 reg = <0x40043000 0x1000>;
 36                                                    36 
 37                 creg_clk: clock-controller {       37                 creg_clk: clock-controller {
 38                         compatible = "nxp,lpc1     38                         compatible = "nxp,lpc1850-creg-clk";
 39                         clocks = <&xtal32>;        39                         clocks = <&xtal32>;
 40                         #clock-cells = <1>;        40                         #clock-cells = <1>;
 41                 };                                 41                 };
 42                                                    42 
 43                 ...                                43                 ...
 44         };                                         44         };
 45                                                    45 
 46         rtc: rtc@40046000 {                        46         rtc: rtc@40046000 {
 47                 ...                                47                 ...
 48                 clocks = <&creg_clk 0>, <&ccu1     48                 clocks = <&creg_clk 0>, <&ccu1 CLK_CPU_BUS>;
 49                 clock-names = "rtc", "reg";        49                 clock-names = "rtc", "reg";
 50                 ...                                50                 ...
 51         };                                         51         };
 52 };                                                 52 };
                                                      

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