1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/media 4 $id: http://devicetree.org/schemas/clock/mediatek,mt2701-hifsys.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MediaTek HIFSYS clock and reset control 7 title: MediaTek HIFSYS clock and reset controller
8 8
9 description: 9 description:
10 The MediaTek HIFSYS controller provides vari 10 The MediaTek HIFSYS controller provides various clocks and reset outputs to
11 the system. 11 the system.
12 12
13 maintainers: 13 maintainers:
14 - Matthias Brugger <matthias.bgg@gmail.com> 14 - Matthias Brugger <matthias.bgg@gmail.com>
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 oneOf: 18 oneOf:
19 - enum: 19 - enum:
20 - mediatek,mt2701-hifsys 20 - mediatek,mt2701-hifsys
21 - mediatek,mt7622-hifsys 21 - mediatek,mt7622-hifsys
22 - items: 22 - items:
23 - enum: 23 - enum:
24 - mediatek,mt7623-hifsys 24 - mediatek,mt7623-hifsys
25 - const: mediatek,mt2701-hifsys 25 - const: mediatek,mt2701-hifsys
26 26
27 reg: 27 reg:
28 maxItems: 1 28 maxItems: 1
29 29
30 "#clock-cells": 30 "#clock-cells":
31 const: 1 31 const: 1
32 description: The available clocks are defi 32 description: The available clocks are defined in dt-bindings/clock/mt*-clk.h
33 33
34 "#reset-cells": 34 "#reset-cells":
35 const: 1 35 const: 1
36 36
37 required: 37 required:
38 - reg 38 - reg
39 - "#clock-cells" 39 - "#clock-cells"
40 40
41 additionalProperties: false 41 additionalProperties: false
42 42
43 examples: 43 examples:
44 - | 44 - |
45 clock-controller@1a000000 { 45 clock-controller@1a000000 {
46 compatible = "mediatek,mt2701-hifsys"; 46 compatible = "mediatek,mt2701-hifsys";
47 reg = <0x1a000000 0x1000>; 47 reg = <0x1a000000 0x1000>;
48 #clock-cells = <1>; 48 #clock-cells = <1>;
49 #reset-cells = <1>; 49 #reset-cells = <1>;
50 }; 50 };
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