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Linux/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml

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Diff markup

Differences between /Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml (Version linux-6.12-rc7) and /Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml (Version linux-5.10.229)


  1 # SPDX-License-Identifier: (GPL-2.0-only OR BS    
  2 %YAML 1.2                                         
  3 ---                                               
  4 $id: http://devicetree.org/schemas/clock/media    
  5 $schema: http://devicetree.org/meta-schemas/co    
  6                                                   
  7 title: MT7621 Clock                               
  8                                                   
  9 maintainers:                                      
 10   - Sergio Paracuellos <sergio.paracuellos@gmai    
 11                                                   
 12 description: |                                    
 13   The MT7621 has a PLL controller from where t    
 14   as well as derived clocks for the bus and th    
 15   can gate SoC device clocks.                     
 16                                                   
 17   Each clock is assigned an identifier and cli    
 18   to specify the clock which they consume.        
 19                                                   
 20   All these identifiers could be found in:        
 21   [1]: <include/dt-bindings/clock/mt7621-clk.h    
 22                                                   
 23   The clocks are provided inside a system cont    
 24                                                   
 25   This node is also a reset provider for all t    
 26                                                   
 27   Reset related bits are defined in:              
 28   [2]: <include/dt-bindings/reset/mt7621-reset    
 29                                                   
 30 properties:                                       
 31   compatible:                                     
 32     items:                                        
 33       - const: mediatek,mt7621-sysc               
 34       - const: syscon                             
 35                                                   
 36   reg:                                            
 37     maxItems: 1                                   
 38                                                   
 39   "#clock-cells":                                 
 40     description:                                  
 41       The first cell indicates the clock numbe    
 42       clocks.                                     
 43     const: 1                                      
 44                                                   
 45   "#reset-cells":                                 
 46     description:                                  
 47       The first cell indicates the reset bit w    
 48       [2] for available resets.                   
 49     const: 1                                      
 50                                                   
 51   ralink,memctl:                                  
 52     $ref: /schemas/types.yaml#/definitions/pha    
 53     description:                                  
 54       phandle of syscon used to control memory    
 55                                                   
 56   clock-output-names:                             
 57     maxItems: 8                                   
 58                                                   
 59 required:                                         
 60   - compatible                                    
 61   - reg                                           
 62   - '#clock-cells'                                
 63   - ralink,memctl                                 
 64                                                   
 65 additionalProperties: false                       
 66                                                   
 67 examples:                                         
 68   - |                                             
 69     #include <dt-bindings/clock/mt7621-clk.h>     
 70                                                   
 71     sysc: sysc@0 {                                
 72       compatible = "mediatek,mt7621-sysc", "sy    
 73       reg = <0x0 0x100>;                          
 74       #clock-cells = <1>;                         
 75       #reset-cells = <1>;                         
 76       ralink,memctl = <&memc>;                    
 77       clock-output-names = "xtal", "cpu", "bus    
 78                            "50m", "125m", "150    
 79                            "250m", "270m";        
 80     };                                            
                                                      

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