1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/qcom, 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Global Clock & Reset Controlle 7 title: Qualcomm Global Clock & Reset Controller on SM8450
8 8
9 maintainers: 9 maintainers:
10 - Vinod Koul <vkoul@kernel.org> 10 - Vinod Koul <vkoul@kernel.org>
11 11
12 description: | 12 description: |
13 Qualcomm global clock control module provide 13 Qualcomm global clock control module provides the clocks, resets and power
14 domains on SM8450 14 domains on SM8450
15 15
16 See also:: include/dt-bindings/clock/qcom,gc 16 See also:: include/dt-bindings/clock/qcom,gcc-sm8450.h
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 const: qcom,gcc-sm8450 20 const: qcom,gcc-sm8450
21 21
22 clocks: 22 clocks:
23 items: 23 items:
24 - description: Board XO source 24 - description: Board XO source
25 - description: Sleep clock source 25 - description: Sleep clock source
26 - description: PCIE 0 Pipe clock source 26 - description: PCIE 0 Pipe clock source (Optional clock)
27 - description: PCIE 1 Pipe clock source 27 - description: PCIE 1 Pipe clock source (Optional clock)
28 - description: PCIE 1 Phy Auxiliary cloc 28 - description: PCIE 1 Phy Auxiliary clock source (Optional clock)
29 - description: UFS Phy Rx symbol 0 clock 29 - description: UFS Phy Rx symbol 0 clock source (Optional clock)
30 - description: UFS Phy Rx symbol 1 clock 30 - description: UFS Phy Rx symbol 1 clock source (Optional clock)
31 - description: UFS Phy Tx symbol 0 clock 31 - description: UFS Phy Tx symbol 0 clock source (Optional clock)
32 - description: USB3 Phy wrapper pipe clo 32 - description: USB3 Phy wrapper pipe clock source (Optional clock)
33 minItems: 2 33 minItems: 2
34 34
35 clock-names: 35 clock-names:
36 items: 36 items:
37 - const: bi_tcxo 37 - const: bi_tcxo
38 - const: sleep_clk 38 - const: sleep_clk
39 - const: pcie_0_pipe_clk # Optional cloc 39 - const: pcie_0_pipe_clk # Optional clock
40 - const: pcie_1_pipe_clk # Optional cloc 40 - const: pcie_1_pipe_clk # Optional clock
41 - const: pcie_1_phy_aux_clk # Optional c 41 - const: pcie_1_phy_aux_clk # Optional clock
42 - const: ufs_phy_rx_symbol_0_clk # Optio 42 - const: ufs_phy_rx_symbol_0_clk # Optional clock
43 - const: ufs_phy_rx_symbol_1_clk # Optio 43 - const: ufs_phy_rx_symbol_1_clk # Optional clock
44 - const: ufs_phy_tx_symbol_0_clk # Optio 44 - const: ufs_phy_tx_symbol_0_clk # Optional clock
45 - const: usb3_phy_wrapper_gcc_usb30_pipe 45 - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock
46 minItems: 2 46 minItems: 2
47 47
48 required: 48 required:
49 - compatible 49 - compatible
50 - clocks 50 - clocks
51 - clock-names 51 - clock-names
52 - '#power-domain-cells' <<
53 52
54 allOf: 53 allOf:
55 - $ref: qcom,gcc.yaml# 54 - $ref: qcom,gcc.yaml#
56 55
57 unevaluatedProperties: false 56 unevaluatedProperties: false
58 57
59 examples: 58 examples:
60 - | 59 - |
61 #include <dt-bindings/clock/qcom,rpmh.h> 60 #include <dt-bindings/clock/qcom,rpmh.h>
62 clock-controller@100000 { 61 clock-controller@100000 {
63 compatible = "qcom,gcc-sm8450"; 62 compatible = "qcom,gcc-sm8450";
64 reg = <0x00100000 0x001f4200>; 63 reg = <0x00100000 0x001f4200>;
65 clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep 64 clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>;
66 clock-names = "bi_tcxo", "sleep_clk"; 65 clock-names = "bi_tcxo", "sleep_clk";
67 #clock-cells = <1>; 66 #clock-cells = <1>;
68 #reset-cells = <1>; 67 #reset-cells = <1>;
69 #power-domain-cells = <1>; 68 #power-domain-cells = <1>;
70 }; 69 };
71 70
72 ... 71 ...
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