1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/qcom, 4 $id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Graphics Clock & Reset Control !! 7 title: Qualcomm Graphics Clock & Reset Controller Binding
8 8
9 maintainers: 9 maintainers:
10 - Taniya Das <quic_tdas@quicinc.com> !! 10 - Taniya Das <tdas@codeaurora.org>
11 11
12 description: | 12 description: |
13 Qualcomm graphics clock control module provi !! 13 Qualcomm graphics clock control module which supports the clocks, resets and
14 domains on Qualcomm SoCs. !! 14 power domains on Qualcomm SoCs.
15 15
16 See also:: !! 16 See also:
17 include/dt-bindings/clock/qcom,gpucc-sdm84 !! 17 dt-bindings/clock/qcom,gpucc-sdm845.h
18 include/dt-bindings/clock/qcom,gpucc-sa877 !! 18 dt-bindings/clock/qcom,gpucc-sc7180.h
19 include/dt-bindings/clock/qcom,gpucc-sc718 !! 19 dt-bindings/clock/qcom,gpucc-sc7280.h
20 include/dt-bindings/clock/qcom,gpucc-sc728 !! 20 dt-bindings/clock/qcom,gpucc-sm6350.h
21 include/dt-bindings/clock/qcom,gpucc-sc828 !! 21 dt-bindings/clock/qcom,gpucc-sm8150.h
22 include/dt-bindings/clock/qcom,gpucc-sm635 !! 22 dt-bindings/clock/qcom,gpucc-sm8250.h
23 include/dt-bindings/clock/qcom,gpucc-sm815 <<
24 include/dt-bindings/clock/qcom,gpucc-sm825 <<
25 include/dt-bindings/clock/qcom,gpucc-sm835 <<
26 23
27 properties: 24 properties:
28 compatible: 25 compatible:
29 enum: 26 enum:
30 - qcom,sdm845-gpucc 27 - qcom,sdm845-gpucc
31 - qcom,sa8775p-gpucc <<
32 - qcom,sc7180-gpucc 28 - qcom,sc7180-gpucc
33 - qcom,sc7280-gpucc 29 - qcom,sc7280-gpucc
34 - qcom,sc8180x-gpucc 30 - qcom,sc8180x-gpucc
35 - qcom,sc8280xp-gpucc <<
36 - qcom,sm6350-gpucc 31 - qcom,sm6350-gpucc
37 - qcom,sm8150-gpucc 32 - qcom,sm8150-gpucc
38 - qcom,sm8250-gpucc 33 - qcom,sm8250-gpucc
39 - qcom,sm8350-gpucc <<
40 34
41 clocks: 35 clocks:
42 items: 36 items:
43 - description: Board XO source 37 - description: Board XO source
44 - description: GPLL0 main branch source 38 - description: GPLL0 main branch source
45 - description: GPLL0 div branch source 39 - description: GPLL0 div branch source
46 40
47 clock-names: 41 clock-names:
48 items: 42 items:
49 - const: bi_tcxo 43 - const: bi_tcxo
50 - const: gcc_gpu_gpll0_clk_src 44 - const: gcc_gpu_gpll0_clk_src
51 - const: gcc_gpu_gpll0_div_clk_src 45 - const: gcc_gpu_gpll0_div_clk_src
52 46
53 power-domains: !! 47 '#clock-cells':
54 maxItems: 1 !! 48 const: 1
>> 49
>> 50 '#reset-cells':
>> 51 const: 1
>> 52
>> 53 '#power-domain-cells':
>> 54 const: 1
55 55
56 vdd-gfx-supply: !! 56 reg:
57 description: Regulator supply for the VDD_ !! 57 maxItems: 1
58 58
59 required: 59 required:
60 - compatible 60 - compatible
>> 61 - reg
61 - clocks 62 - clocks
62 - clock-names 63 - clock-names
>> 64 - '#clock-cells'
>> 65 - '#reset-cells'
63 - '#power-domain-cells' 66 - '#power-domain-cells'
64 67
65 # Require that power-domains and vdd-gfx-suppl !! 68 additionalProperties: false
66 not: <<
67 required: <<
68 - power-domains <<
69 - vdd-gfx-supply <<
70 <<
71 allOf: <<
72 - $ref: qcom,gcc.yaml# <<
73 <<
74 unevaluatedProperties: false <<
75 69
76 examples: 70 examples:
77 - | 71 - |
78 #include <dt-bindings/clock/qcom,gcc-sdm84 72 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
79 #include <dt-bindings/clock/qcom,rpmh.h> 73 #include <dt-bindings/clock/qcom,rpmh.h>
80 clock-controller@5090000 { 74 clock-controller@5090000 {
81 compatible = "qcom,sdm845-gpucc"; 75 compatible = "qcom,sdm845-gpucc";
82 reg = <0x05090000 0x9000>; 76 reg = <0x05090000 0x9000>;
83 clocks = <&rpmhcc RPMH_CXO_CLK>, 77 clocks = <&rpmhcc RPMH_CXO_CLK>,
84 <&gcc GCC_GPU_GPLL0_CLK_SRC>, 78 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
85 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC 79 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
86 clock-names = "bi_tcxo", 80 clock-names = "bi_tcxo",
87 "gcc_gpu_gpll0_clk_src", 81 "gcc_gpu_gpll0_clk_src",
88 "gcc_gpu_gpll0_div_clk_src 82 "gcc_gpu_gpll0_div_clk_src";
89 #clock-cells = <1>; 83 #clock-cells = <1>;
90 #reset-cells = <1>; 84 #reset-cells = <1>;
91 #power-domain-cells = <1>; 85 #power-domain-cells = <1>;
92 }; 86 };
93 ... 87 ...
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