1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/qcom, 4 $id: http://devicetree.org/schemas/clock/qcom,msm8996-cbf.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm MSM8996 Core Bus Fabric (CBF) 7 title: Qualcomm MSM8996 Core Bus Fabric (CBF) clock controller
8 8
9 maintainers: 9 maintainers:
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.o 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 11
12 description: > 12 description: >
13 The clock controller for the Qualcomm MSM899 13 The clock controller for the Qualcomm MSM8996 CBF clock, which drives the
14 interconnect between two CPU clusters. 14 interconnect between two CPU clusters.
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 enum: 18 enum:
19 - qcom,msm8996-cbf 19 - qcom,msm8996-cbf
20 - qcom,msm8996pro-cbf 20 - qcom,msm8996pro-cbf
21 21
22 reg: 22 reg:
23 maxItems: 1 23 maxItems: 1
24 24
25 clocks: 25 clocks:
26 items: 26 items:
27 - description: XO source 27 - description: XO source
28 - description: SYS APCS AUX clock 28 - description: SYS APCS AUX clock
29 29
30 '#clock-cells': 30 '#clock-cells':
31 const: 0 31 const: 0
32 32
33 '#interconnect-cells': 33 '#interconnect-cells':
34 const: 1 34 const: 1
35 35
36 required: 36 required:
37 - compatible 37 - compatible
38 - reg 38 - reg
39 - clocks 39 - clocks
40 - '#clock-cells' 40 - '#clock-cells'
41 - '#interconnect-cells' 41 - '#interconnect-cells'
42 42
43 additionalProperties: false 43 additionalProperties: false
44 44
45 examples: 45 examples:
46 - | 46 - |
47 #include <dt-bindings/clock/qcom,rpmcc.h> 47 #include <dt-bindings/clock/qcom,rpmcc.h>
48 clock-controller@9a11000 { 48 clock-controller@9a11000 {
49 compatible = "qcom,msm8996-cbf"; 49 compatible = "qcom,msm8996-cbf";
50 reg = <0x09a11000 0x10000>; 50 reg = <0x09a11000 0x10000>;
51 clocks = <&rpmcc RPM_SMD_BB_CLK1>, <&a 51 clocks = <&rpmcc RPM_SMD_BB_CLK1>, <&apcs_glb>;
52 #clock-cells = <0>; 52 #clock-cells = <0>;
53 #interconnect-cells = <1>; 53 #interconnect-cells = <1>;
54 }; 54 };
55 ... 55 ...
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