1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/qcom, 4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Display Clock Controller for S 7 title: Qualcomm Display Clock Controller for SM6115
8 8
9 maintainers: 9 maintainers:
10 - Bjorn Andersson <andersson@kernel.org> 10 - Bjorn Andersson <andersson@kernel.org>
11 11
12 description: | 12 description: |
13 Qualcomm display clock control module provid !! 13 Qualcomm display clock control module which supports the clocks and
14 on SM6115. !! 14 power domains on SM6115.
15 15
16 See also:: include/dt-bindings/clock/qcom,sm !! 16 See also:
>> 17 include/dt-bindings/clock/qcom,sm6115-dispcc.h
17 18
18 properties: 19 properties:
19 compatible: 20 compatible:
20 enum: 21 enum:
21 - qcom,sm6115-dispcc 22 - qcom,sm6115-dispcc
22 23
23 clocks: 24 clocks:
24 items: 25 items:
25 - description: Board XO source 26 - description: Board XO source
26 - description: Board sleep clock 27 - description: Board sleep clock
27 - description: Byte clock from DSI PHY0 28 - description: Byte clock from DSI PHY0
28 - description: Pixel clock from DSI PHY0 29 - description: Pixel clock from DSI PHY0
29 - description: GPLL0 DISP DIV clock from 30 - description: GPLL0 DISP DIV clock from GCC
30 31
>> 32 '#clock-cells':
>> 33 const: 1
>> 34
>> 35 '#reset-cells':
>> 36 const: 1
>> 37
>> 38 '#power-domain-cells':
>> 39 const: 1
>> 40
>> 41 reg:
>> 42 maxItems: 1
>> 43
31 required: 44 required:
32 - compatible 45 - compatible
>> 46 - reg
33 - clocks 47 - clocks
>> 48 - '#clock-cells'
>> 49 - '#reset-cells'
34 - '#power-domain-cells' 50 - '#power-domain-cells'
35 51
36 allOf: !! 52 additionalProperties: false
37 - $ref: qcom,gcc.yaml# <<
38 <<
39 unevaluatedProperties: false <<
40 53
41 examples: 54 examples:
42 - | 55 - |
43 #include <dt-bindings/clock/qcom,rpmcc.h> 56 #include <dt-bindings/clock/qcom,rpmcc.h>
44 #include <dt-bindings/clock/qcom,gcc-sm611 57 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
45 clock-controller@5f00000 { 58 clock-controller@5f00000 {
46 compatible = "qcom,sm6115-dispcc"; 59 compatible = "qcom,sm6115-dispcc";
47 reg = <0x5f00000 0x20000>; 60 reg = <0x5f00000 0x20000>;
48 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, 61 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
49 <&sleep_clk>, 62 <&sleep_clk>,
50 <&dsi0_phy 0>, 63 <&dsi0_phy 0>,
51 <&dsi0_phy 1>, 64 <&dsi0_phy 1>,
52 <&gcc GCC_DISP_GPLL0_DIV_CLK_SR 65 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>;
53 #clock-cells = <1>; 66 #clock-cells = <1>;
54 #reset-cells = <1>; 67 #reset-cells = <1>;
55 #power-domain-cells = <1>; 68 #power-domain-cells = <1>;
56 }; 69 };
57 ... 70 ...
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