1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/qcom, 4 $id: http://devicetree.org/schemas/clock/qcom,sm7150-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Global Clock & Reset Controlle 7 title: Qualcomm Global Clock & Reset Controller on SM7150
8 8
9 maintainers: 9 maintainers:
10 - Bjorn Andersson <andersson@kernel.org> 10 - Bjorn Andersson <andersson@kernel.org>
11 - Danila Tikhonov <danila@jiaxyga.com> 11 - Danila Tikhonov <danila@jiaxyga.com>
12 - David Wronek <davidwronek@gmail.com> 12 - David Wronek <davidwronek@gmail.com>
13 13
14 description: | 14 description: |
15 Qualcomm global clock control module provide 15 Qualcomm global clock control module provides the clocks, resets and power
16 domains on SM7150 16 domains on SM7150
17 17
18 See also:: include/dt-bindings/clock/qcom,sm 18 See also:: include/dt-bindings/clock/qcom,sm7150-gcc.h
19 19
20 properties: 20 properties:
21 compatible: 21 compatible:
22 const: qcom,sm7150-gcc 22 const: qcom,sm7150-gcc
23 23
24 clocks: 24 clocks:
25 items: 25 items:
26 - description: Board XO source 26 - description: Board XO source
27 - description: Board XO Active-Only sour 27 - description: Board XO Active-Only source
28 - description: Sleep clock source 28 - description: Sleep clock source
29 29
30 required: 30 required:
31 - compatible 31 - compatible
32 - clocks 32 - clocks
33 - '#power-domain-cells' <<
34 33
35 allOf: 34 allOf:
36 - $ref: qcom,gcc.yaml# 35 - $ref: qcom,gcc.yaml#
37 36
38 unevaluatedProperties: false 37 unevaluatedProperties: false
39 38
40 examples: 39 examples:
41 - | 40 - |
42 #include <dt-bindings/clock/qcom,rpmh.h> 41 #include <dt-bindings/clock/qcom,rpmh.h>
43 clock-controller@100000 { 42 clock-controller@100000 {
44 compatible = "qcom,sm7150-gcc"; 43 compatible = "qcom,sm7150-gcc";
45 reg = <0x00100000 0x001f0000>; 44 reg = <0x00100000 0x001f0000>;
46 clocks = <&rpmhcc RPMH_CXO_CLK>, 45 clocks = <&rpmhcc RPMH_CXO_CLK>,
47 <&rpmhcc RPMH_CXO_CLK_A>, 46 <&rpmhcc RPMH_CXO_CLK_A>,
48 <&sleep_clk>; 47 <&sleep_clk>;
49 #clock-cells = <1>; 48 #clock-cells = <1>;
50 #reset-cells = <1>; 49 #reset-cells = <1>;
51 #power-domain-cells = <1>; 50 #power-domain-cells = <1>;
52 }; 51 };
53 ... 52 ...
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