1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/qcom, 4 $id: http://devicetree.org/schemas/clock/qcom,sm8350-videocc.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm SM8350 Video Clock & Reset Con 7 title: Qualcomm SM8350 Video Clock & Reset Controller
8 8
9 maintainers: 9 maintainers:
10 - Konrad Dybcio <konradybcio@kernel.org> 10 - Konrad Dybcio <konradybcio@kernel.org>
11 11
12 description: | 12 description: |
13 Qualcomm video clock control module provides 13 Qualcomm video clock control module provides the clocks, resets and power
14 domains on Qualcomm SoCs. 14 domains on Qualcomm SoCs.
15 15
16 See also:: 16 See also::
17 include/dt-bindings/clock/qcom,videocc-sm8 17 include/dt-bindings/clock/qcom,videocc-sm8350.h
18 include/dt-bindings/reset/qcom,videocc-sm8 18 include/dt-bindings/reset/qcom,videocc-sm8350.h
19 19
20 properties: 20 properties:
21 compatible: 21 compatible:
22 enum: 22 enum:
23 - qcom,sc8280xp-videocc 23 - qcom,sc8280xp-videocc
24 - qcom,sm8350-videocc 24 - qcom,sm8350-videocc
25 25
26 clocks: 26 clocks:
27 items: 27 items:
28 - description: Board XO source 28 - description: Board XO source
29 - description: Board active XO source 29 - description: Board active XO source
30 - description: Board sleep clock 30 - description: Board sleep clock
31 31
32 power-domains: 32 power-domains:
33 description: 33 description:
34 A phandle and PM domain specifier for th 34 A phandle and PM domain specifier for the MMCX power domain.
35 maxItems: 1 35 maxItems: 1
36 36
37 required-opps: 37 required-opps:
38 description: 38 description:
39 A phandle to an OPP node describing requ 39 A phandle to an OPP node describing required MMCX performance point.
40 maxItems: 1 40 maxItems: 1
41 41
42 required: 42 required:
43 - compatible 43 - compatible
44 - clocks 44 - clocks
45 - power-domains 45 - power-domains
46 - required-opps 46 - required-opps
47 47
48 allOf: 48 allOf:
49 - $ref: qcom,gcc.yaml# 49 - $ref: qcom,gcc.yaml#
50 50
51 unevaluatedProperties: false 51 unevaluatedProperties: false
52 52
53 examples: 53 examples:
54 - | 54 - |
55 #include <dt-bindings/clock/qcom,rpmh.h> 55 #include <dt-bindings/clock/qcom,rpmh.h>
56 #include <dt-bindings/power/qcom,rpmhpd.h> 56 #include <dt-bindings/power/qcom,rpmhpd.h>
57 57
58 clock-controller@abf0000 { 58 clock-controller@abf0000 {
59 compatible = "qcom,sm8350-videocc"; 59 compatible = "qcom,sm8350-videocc";
60 reg = <0x0abf0000 0x10000>; 60 reg = <0x0abf0000 0x10000>;
61 clocks = <&rpmhcc RPMH_CXO_CLK>, 61 clocks = <&rpmhcc RPMH_CXO_CLK>,
62 <&rpmhcc RPMH_CXO_CLK_A>, 62 <&rpmhcc RPMH_CXO_CLK_A>,
63 <&sleep_clk>; 63 <&sleep_clk>;
64 power-domains = <&rpmhpd RPMHPD_MMCX>; 64 power-domains = <&rpmhpd RPMHPD_MMCX>;
65 required-opps = <&rpmhpd_opp_low_svs>; 65 required-opps = <&rpmhpd_opp_low_svs>;
66 #clock-cells = <1>; 66 #clock-cells = <1>;
67 #reset-cells = <1>; 67 #reset-cells = <1>;
68 #power-domain-cells = <1>; 68 #power-domain-cells = <1>;
69 }; 69 };
70 ... 70 ...
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