1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) !! 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/rockc 4 $id: http://devicetree.org/schemas/clock/rockchip,px30-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Rockchip PX30 Clock and Reset Unit (CRU 7 title: Rockchip PX30 Clock and Reset Unit (CRU)
8 8
9 maintainers: 9 maintainers:
10 - Elaine Zhang <zhangqing@rock-chips.com> 10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de> 11 - Heiko Stuebner <heiko@sntech.de>
12 12
13 description: | 13 description: |
14 The PX30 clock controller generates and supp 14 The PX30 clock controller generates and supplies clocks to various
15 controllers within the SoC and also implemen 15 controllers within the SoC and also implements a reset controller for SoC
16 peripherals. 16 peripherals.
17 Each clock is assigned an identifier and cli 17 Each clock is assigned an identifier and client nodes can use this identifier
18 to specify the clock which they consume. All 18 to specify the clock which they consume. All available clocks are defined as
19 preprocessor macros in the dt-bindings/clock 19 preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be
20 used in device tree sources. Similar macros 20 used in device tree sources. Similar macros exist for the reset sources in
21 these files. 21 these files.
22 There are several clocks that are generated 22 There are several clocks that are generated outside the SoC. It is expected
23 that they are defined using standard clock b 23 that they are defined using standard clock bindings with following
24 clock-output-names: 24 clock-output-names:
25 - "xin24m" - crystal input - req 25 - "xin24m" - crystal input - required
26 - "xin32k" - rtc clock - opt 26 - "xin32k" - rtc clock - optional
27 - "i2sx_clkin" - external I2S clock - opt 27 - "i2sx_clkin" - external I2S clock - optional
28 - "gmac_clkin" - external GMAC clock - opt 28 - "gmac_clkin" - external GMAC clock - optional
29 29
30 properties: 30 properties:
31 compatible: 31 compatible:
32 enum: 32 enum:
33 - rockchip,px30-cru 33 - rockchip,px30-cru
34 - rockchip,px30-pmucru 34 - rockchip,px30-pmucru
35 35
36 reg: 36 reg:
37 maxItems: 1 37 maxItems: 1
38 38
39 "#clock-cells": 39 "#clock-cells":
40 const: 1 40 const: 1
41 41
42 "#reset-cells": 42 "#reset-cells":
43 const: 1 43 const: 1
44 44
45 clocks: 45 clocks:
46 minItems: 1 46 minItems: 1
47 items: 47 items:
48 - description: Clock for both PMUCRU and 48 - description: Clock for both PMUCRU and CRU
49 - description: Clock for CRU (sourced fr 49 - description: Clock for CRU (sourced from PMUCRU)
50 50
51 clock-names: 51 clock-names:
52 minItems: 1 52 minItems: 1
53 items: 53 items:
54 - const: xin24m 54 - const: xin24m
55 - const: gpll 55 - const: gpll
56 56
57 rockchip,grf: 57 rockchip,grf:
58 $ref: /schemas/types.yaml#/definitions/pha 58 $ref: /schemas/types.yaml#/definitions/phandle
59 description: 59 description:
60 Phandle to the syscon managing the "gene 60 Phandle to the syscon managing the "general register files" (GRF),
61 if missing pll rates are not changeable, 61 if missing pll rates are not changeable, due to the missing pll
62 lock status. 62 lock status.
63 63
64 required: 64 required:
65 - compatible 65 - compatible
66 - reg 66 - reg
67 - clocks 67 - clocks
68 - clock-names 68 - clock-names
69 - "#clock-cells" 69 - "#clock-cells"
70 - "#reset-cells" 70 - "#reset-cells"
71 71
72 allOf: 72 allOf:
73 - if: 73 - if:
74 properties: 74 properties:
75 compatible: 75 compatible:
76 contains: 76 contains:
77 const: rockchip,px30-cru 77 const: rockchip,px30-cru
78 78
79 then: 79 then:
80 properties: 80 properties:
81 clocks: 81 clocks:
82 minItems: 2 82 minItems: 2
83 83
84 clock-names: 84 clock-names:
85 minItems: 2 85 minItems: 2
86 86
87 else: 87 else:
88 properties: 88 properties:
89 clocks: 89 clocks:
90 maxItems: 1 90 maxItems: 1
91 91
92 clock-names: 92 clock-names:
93 maxItems: 1 93 maxItems: 1
94 94
95 additionalProperties: false 95 additionalProperties: false
96 96
97 examples: 97 examples:
98 - | 98 - |
99 #include <dt-bindings/clock/px30-cru.h> 99 #include <dt-bindings/clock/px30-cru.h>
100 100
101 pmucru: clock-controller@ff2bc000 { 101 pmucru: clock-controller@ff2bc000 {
102 compatible = "rockchip,px30-pmucru"; 102 compatible = "rockchip,px30-pmucru";
103 reg = <0xff2bc000 0x1000>; 103 reg = <0xff2bc000 0x1000>;
104 clocks = <&xin24m>; 104 clocks = <&xin24m>;
105 clock-names = "xin24m"; 105 clock-names = "xin24m";
106 rockchip,grf = <&grf>; 106 rockchip,grf = <&grf>;
107 #clock-cells = <1>; 107 #clock-cells = <1>;
108 #reset-cells = <1>; 108 #reset-cells = <1>;
109 }; 109 };
110 110
111 cru: clock-controller@ff2b0000 { 111 cru: clock-controller@ff2b0000 {
112 compatible = "rockchip,px30-cru"; 112 compatible = "rockchip,px30-cru";
113 reg = <0xff2b0000 0x1000>; 113 reg = <0xff2b0000 0x1000>;
114 clocks = <&xin24m>, <&pmucru PLL_GPLL>; 114 clocks = <&xin24m>, <&pmucru PLL_GPLL>;
115 clock-names = "xin24m", "gpll"; 115 clock-names = "xin24m", "gpll";
116 rockchip,grf = <&grf>; 116 rockchip,grf = <&grf>;
117 #clock-cells = <1>; 117 #clock-cells = <1>;
118 #reset-cells = <1>; 118 #reset-cells = <1>;
119 }; 119 };
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