1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/samsu 4 $id: http://devicetree.org/schemas/clock/samsung,exynos5433-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Samsung Exynos5433 SoC clock controller 7 title: Samsung Exynos5433 SoC clock controller
8 8
9 maintainers: 9 maintainers:
10 - Chanwoo Choi <cw00.choi@samsung.com> 10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org> !! 11 - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com> 13 - Tomasz Figa <tomasz.figa@gmail.com>
14 14
15 description: | 15 description: |
16 Expected external clocks, defined in DTS as 16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
17 name:: 17 name::
18 - "oscclk" - PLL input clock from XXTI 18 - "oscclk" - PLL input clock from XXTI
19 19
20 All available clocks are defined as preproce 20 All available clocks are defined as preprocessor macros in
21 include/dt-bindings/clock/exynos5433.h heade 21 include/dt-bindings/clock/exynos5433.h header.
22 22
23 properties: 23 properties:
24 compatible: 24 compatible:
25 enum: 25 enum:
26 # CMU_TOP which generates clocks for 26 # CMU_TOP which generates clocks for
27 # IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC 27 # IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS domains and bus
28 # clocks 28 # clocks
29 - samsung,exynos5433-cmu-top 29 - samsung,exynos5433-cmu-top
30 # CMU_CPIF which generates clocks for 30 # CMU_CPIF which generates clocks for LLI (Low Latency Interface) IP
31 - samsung,exynos5433-cmu-cpif 31 - samsung,exynos5433-cmu-cpif
32 # CMU_MIF which generates clocks for D 32 # CMU_MIF which generates clocks for DRAM Memory Controller domain
33 - samsung,exynos5433-cmu-mif 33 - samsung,exynos5433-cmu-mif
34 # CMU_PERIC which generates clocks for 34 # CMU_PERIC which generates clocks for
35 # UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMB 35 # UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS IPs
36 - samsung,exynos5433-cmu-peric 36 - samsung,exynos5433-cmu-peric
37 # CMU_PERIS which generates clocks for 37 # CMU_PERIS which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs
38 - samsung,exynos5433-cmu-peris 38 - samsung,exynos5433-cmu-peris
39 # CMU_FSYS which generates clocks for 39 # CMU_FSYS which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs
40 - samsung,exynos5433-cmu-fsys 40 - samsung,exynos5433-cmu-fsys
41 - samsung,exynos5433-cmu-g2d 41 - samsung,exynos5433-cmu-g2d
42 # CMU_DISP which generates clocks for 42 # CMU_DISP which generates clocks for Display (DECON/HDMI/DSIM/MIXER) IPs
43 - samsung,exynos5433-cmu-disp 43 - samsung,exynos5433-cmu-disp
44 - samsung,exynos5433-cmu-aud 44 - samsung,exynos5433-cmu-aud
45 - samsung,exynos5433-cmu-bus0 45 - samsung,exynos5433-cmu-bus0
46 - samsung,exynos5433-cmu-bus1 46 - samsung,exynos5433-cmu-bus1
47 - samsung,exynos5433-cmu-bus2 47 - samsung,exynos5433-cmu-bus2
48 - samsung,exynos5433-cmu-g3d 48 - samsung,exynos5433-cmu-g3d
49 - samsung,exynos5433-cmu-gscl 49 - samsung,exynos5433-cmu-gscl
50 - samsung,exynos5433-cmu-apollo 50 - samsung,exynos5433-cmu-apollo
51 # CMU_ATLAS which generates clocks for 51 # CMU_ATLAS which generates clocks for Cortex-A57 Quad-core processor,
52 # CoreSight and L2 cache controller 52 # CoreSight and L2 cache controller
53 - samsung,exynos5433-cmu-atlas 53 - samsung,exynos5433-cmu-atlas
54 # CMU_MSCL which generates clocks for 54 # CMU_MSCL which generates clocks for M2M (Memory to Memory) scaler and
55 # JPEG IPs 55 # JPEG IPs
56 - samsung,exynos5433-cmu-mscl 56 - samsung,exynos5433-cmu-mscl
57 - samsung,exynos5433-cmu-mfc 57 - samsung,exynos5433-cmu-mfc
58 - samsung,exynos5433-cmu-hevc 58 - samsung,exynos5433-cmu-hevc
59 # CMU_ISP which generates clocks for F 59 # CMU_ISP which generates clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs
60 - samsung,exynos5433-cmu-isp 60 - samsung,exynos5433-cmu-isp
61 # CMU_CAM0 which generates clocks for 61 # CMU_CAM0 which generates clocks for
62 # MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIM 62 # MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs
63 - samsung,exynos5433-cmu-cam0 63 - samsung,exynos5433-cmu-cam0
64 # CMU_CAM1 which generates clocks for 64 # CMU_CAM1 which generates clocks for
65 # Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIM 65 # Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs
66 - samsung,exynos5433-cmu-cam1 66 - samsung,exynos5433-cmu-cam1
67 # CMU_IMEM which generates clocks for 67 # CMU_IMEM which generates clocks for SSS (Security SubSystem) and
68 # SlimSSS IPs 68 # SlimSSS IPs
69 - samsung,exynos5433-cmu-imem 69 - samsung,exynos5433-cmu-imem
70 70
71 clocks: 71 clocks:
72 minItems: 1 72 minItems: 1
73 maxItems: 10 73 maxItems: 10
74 74
75 clock-names: 75 clock-names:
76 minItems: 1 76 minItems: 1
77 maxItems: 10 77 maxItems: 10
78 78
79 "#clock-cells": 79 "#clock-cells":
80 const: 1 80 const: 1
81 81
82 power-domains: 82 power-domains:
83 maxItems: 1 83 maxItems: 1
84 84
85 reg: 85 reg:
86 maxItems: 1 86 maxItems: 1
87 87
88 required: 88 required:
89 - compatible 89 - compatible
90 - "#clock-cells" 90 - "#clock-cells"
91 - reg 91 - reg
92 92
93 allOf: 93 allOf:
94 - if: 94 - if:
95 properties: 95 properties:
96 compatible: 96 compatible:
97 contains: 97 contains:
98 const: samsung,exynos5433-cmu-top 98 const: samsung,exynos5433-cmu-top
99 then: 99 then:
100 properties: 100 properties:
101 clocks: 101 clocks:
102 minItems: 4 102 minItems: 4
103 maxItems: 4 103 maxItems: 4
104 clock-names: 104 clock-names:
105 items: 105 items:
106 - const: oscclk 106 - const: oscclk
107 - const: sclk_mphy_pll 107 - const: sclk_mphy_pll
108 - const: sclk_mfc_pll 108 - const: sclk_mfc_pll
109 - const: sclk_bus_pll 109 - const: sclk_bus_pll
110 required: 110 required:
111 - clock-names 111 - clock-names
112 - clocks 112 - clocks
113 113
114 - if: 114 - if:
115 properties: 115 properties:
116 compatible: 116 compatible:
117 contains: 117 contains:
118 const: samsung,exynos5433-cmu-cpif 118 const: samsung,exynos5433-cmu-cpif
119 then: 119 then:
120 properties: 120 properties:
121 clocks: 121 clocks:
122 minItems: 1 122 minItems: 1
123 maxItems: 1 123 maxItems: 1
124 clock-names: 124 clock-names:
125 items: 125 items:
126 - const: oscclk 126 - const: oscclk
127 required: 127 required:
128 - clock-names 128 - clock-names
129 - clocks 129 - clocks
130 130
131 - if: 131 - if:
132 properties: 132 properties:
133 compatible: 133 compatible:
134 contains: 134 contains:
135 const: samsung,exynos5433-cmu-mif 135 const: samsung,exynos5433-cmu-mif
136 then: 136 then:
137 properties: 137 properties:
138 clocks: 138 clocks:
139 minItems: 2 139 minItems: 2
140 maxItems: 2 140 maxItems: 2
141 clock-names: 141 clock-names:
142 items: 142 items:
143 - const: oscclk 143 - const: oscclk
144 - const: sclk_mphy_pll 144 - const: sclk_mphy_pll
145 required: 145 required:
146 - clock-names 146 - clock-names
147 - clocks 147 - clocks
148 148
149 - if: 149 - if:
150 properties: 150 properties:
151 compatible: 151 compatible:
152 contains: 152 contains:
153 const: samsung,exynos5433-cmu-fsys 153 const: samsung,exynos5433-cmu-fsys
154 then: 154 then:
155 properties: 155 properties:
156 clocks: 156 clocks:
157 minItems: 10 157 minItems: 10
158 maxItems: 10 158 maxItems: 10
159 clock-names: 159 clock-names:
160 items: 160 items:
161 - const: oscclk 161 - const: oscclk
162 - const: sclk_ufs_mphy 162 - const: sclk_ufs_mphy
163 - const: aclk_fsys_200 163 - const: aclk_fsys_200
164 - const: sclk_pcie_100_fsys 164 - const: sclk_pcie_100_fsys
165 - const: sclk_ufsunipro_fsys 165 - const: sclk_ufsunipro_fsys
166 - const: sclk_mmc2_fsys 166 - const: sclk_mmc2_fsys
167 - const: sclk_mmc1_fsys 167 - const: sclk_mmc1_fsys
168 - const: sclk_mmc0_fsys 168 - const: sclk_mmc0_fsys
169 - const: sclk_usbhost30_fsys 169 - const: sclk_usbhost30_fsys
170 - const: sclk_usbdrd30_fsys 170 - const: sclk_usbdrd30_fsys
171 required: 171 required:
172 - clock-names 172 - clock-names
173 - clocks 173 - clocks
174 174
175 - if: 175 - if:
176 properties: 176 properties:
177 compatible: 177 compatible:
178 contains: 178 contains:
179 const: samsung,exynos5433-cmu-g2d 179 const: samsung,exynos5433-cmu-g2d
180 then: 180 then:
181 properties: 181 properties:
182 clocks: 182 clocks:
183 minItems: 3 183 minItems: 3
184 maxItems: 3 184 maxItems: 3
185 clock-names: 185 clock-names:
186 items: 186 items:
187 - const: oscclk 187 - const: oscclk
188 - const: aclk_g2d_266 188 - const: aclk_g2d_266
189 - const: aclk_g2d_400 189 - const: aclk_g2d_400
190 required: 190 required:
191 - clock-names 191 - clock-names
192 - clocks 192 - clocks
193 193
194 - if: 194 - if:
195 properties: 195 properties:
196 compatible: 196 compatible:
197 contains: 197 contains:
198 const: samsung,exynos5433-cmu-disp 198 const: samsung,exynos5433-cmu-disp
199 then: 199 then:
200 properties: 200 properties:
201 clocks: 201 clocks:
202 minItems: 9 202 minItems: 9
203 maxItems: 9 203 maxItems: 9
204 clock-names: 204 clock-names:
205 items: 205 items:
206 - const: oscclk 206 - const: oscclk
207 - const: sclk_dsim1_disp 207 - const: sclk_dsim1_disp
208 - const: sclk_dsim0_disp 208 - const: sclk_dsim0_disp
209 - const: sclk_dsd_disp 209 - const: sclk_dsd_disp
210 - const: sclk_decon_tv_eclk_disp 210 - const: sclk_decon_tv_eclk_disp
211 - const: sclk_decon_vclk_disp 211 - const: sclk_decon_vclk_disp
212 - const: sclk_decon_eclk_disp 212 - const: sclk_decon_eclk_disp
213 - const: sclk_decon_tv_vclk_disp 213 - const: sclk_decon_tv_vclk_disp
214 - const: aclk_disp_333 214 - const: aclk_disp_333
215 required: 215 required:
216 - clock-names 216 - clock-names
217 - clocks 217 - clocks
218 218
219 - if: 219 - if:
220 properties: 220 properties:
221 compatible: 221 compatible:
222 contains: 222 contains:
223 const: samsung,exynos5433-cmu-aud 223 const: samsung,exynos5433-cmu-aud
224 then: 224 then:
225 properties: 225 properties:
226 clocks: 226 clocks:
227 minItems: 2 227 minItems: 2
228 maxItems: 2 228 maxItems: 2
229 clock-names: 229 clock-names:
230 items: 230 items:
231 - const: oscclk 231 - const: oscclk
232 - const: fout_aud_pll 232 - const: fout_aud_pll
233 required: 233 required:
234 - clock-names 234 - clock-names
235 - clocks 235 - clocks
236 236
237 - if: 237 - if:
238 properties: 238 properties:
239 compatible: 239 compatible:
240 contains: 240 contains:
241 const: samsung,exynos5433-cmu-bus0 241 const: samsung,exynos5433-cmu-bus0
242 then: 242 then:
243 properties: 243 properties:
244 clocks: 244 clocks:
245 minItems: 1 245 minItems: 1
246 maxItems: 1 246 maxItems: 1
247 clock-names: 247 clock-names:
248 items: 248 items:
249 - const: aclk_bus0_400 249 - const: aclk_bus0_400
250 required: 250 required:
251 - clock-names 251 - clock-names
252 - clocks 252 - clocks
253 253
254 - if: 254 - if:
255 properties: 255 properties:
256 compatible: 256 compatible:
257 contains: 257 contains:
258 const: samsung,exynos5433-cmu-bus1 258 const: samsung,exynos5433-cmu-bus1
259 then: 259 then:
260 properties: 260 properties:
261 clocks: 261 clocks:
262 minItems: 1 262 minItems: 1
263 maxItems: 1 263 maxItems: 1
264 clock-names: 264 clock-names:
265 items: 265 items:
266 - const: aclk_bus1_400 266 - const: aclk_bus1_400
267 required: 267 required:
268 - clock-names 268 - clock-names
269 - clocks 269 - clocks
270 270
271 - if: 271 - if:
272 properties: 272 properties:
273 compatible: 273 compatible:
274 contains: 274 contains:
275 const: samsung,exynos5433-cmu-bus2 275 const: samsung,exynos5433-cmu-bus2
276 then: 276 then:
277 properties: 277 properties:
278 clocks: 278 clocks:
279 minItems: 2 279 minItems: 2
280 maxItems: 2 280 maxItems: 2
281 clock-names: 281 clock-names:
282 items: 282 items:
283 - const: oscclk 283 - const: oscclk
284 - const: aclk_bus2_400 284 - const: aclk_bus2_400
285 required: 285 required:
286 - clock-names 286 - clock-names
287 - clocks 287 - clocks
288 288
289 - if: 289 - if:
290 properties: 290 properties:
291 compatible: 291 compatible:
292 contains: 292 contains:
293 const: samsung,exynos5433-cmu-g3d 293 const: samsung,exynos5433-cmu-g3d
294 then: 294 then:
295 properties: 295 properties:
296 clocks: 296 clocks:
297 minItems: 2 297 minItems: 2
298 maxItems: 2 298 maxItems: 2
299 clock-names: 299 clock-names:
300 items: 300 items:
301 - const: oscclk 301 - const: oscclk
302 - const: aclk_g3d_400 302 - const: aclk_g3d_400
303 required: 303 required:
304 - clock-names 304 - clock-names
305 - clocks 305 - clocks
306 306
307 - if: 307 - if:
308 properties: 308 properties:
309 compatible: 309 compatible:
310 contains: 310 contains:
311 const: samsung,exynos5433-cmu-gscl 311 const: samsung,exynos5433-cmu-gscl
312 then: 312 then:
313 properties: 313 properties:
314 clocks: 314 clocks:
315 minItems: 3 315 minItems: 3
316 maxItems: 3 316 maxItems: 3
317 clock-names: 317 clock-names:
318 items: 318 items:
319 - const: oscclk 319 - const: oscclk
320 - const: aclk_gscl_111 320 - const: aclk_gscl_111
321 - const: aclk_gscl_333 321 - const: aclk_gscl_333
322 required: 322 required:
323 - clock-names 323 - clock-names
324 - clocks 324 - clocks
325 325
326 - if: 326 - if:
327 properties: 327 properties:
328 compatible: 328 compatible:
329 contains: 329 contains:
330 const: samsung,exynos5433-cmu-apol 330 const: samsung,exynos5433-cmu-apollo
331 then: 331 then:
332 properties: 332 properties:
333 clocks: 333 clocks:
334 minItems: 2 334 minItems: 2
335 maxItems: 2 335 maxItems: 2
336 clock-names: 336 clock-names:
337 items: 337 items:
338 - const: oscclk 338 - const: oscclk
339 - const: sclk_bus_pll_apollo 339 - const: sclk_bus_pll_apollo
340 required: 340 required:
341 - clock-names 341 - clock-names
342 - clocks 342 - clocks
343 343
344 - if: 344 - if:
345 properties: 345 properties:
346 compatible: 346 compatible:
347 contains: 347 contains:
348 const: samsung,exynos5433-cmu-atla 348 const: samsung,exynos5433-cmu-atlas
349 then: 349 then:
350 properties: 350 properties:
351 clocks: 351 clocks:
352 minItems: 2 352 minItems: 2
353 maxItems: 2 353 maxItems: 2
354 clock-names: 354 clock-names:
355 items: 355 items:
356 - const: oscclk 356 - const: oscclk
357 - const: sclk_bus_pll_atlas 357 - const: sclk_bus_pll_atlas
358 required: 358 required:
359 - clock-names 359 - clock-names
360 - clocks 360 - clocks
361 361
362 - if: 362 - if:
363 properties: 363 properties:
364 compatible: 364 compatible:
365 contains: 365 contains:
366 const: samsung,exynos5433-cmu-mscl 366 const: samsung,exynos5433-cmu-mscl
367 then: 367 then:
368 properties: 368 properties:
369 clocks: 369 clocks:
370 minItems: 3 370 minItems: 3
371 maxItems: 3 371 maxItems: 3
372 clock-names: 372 clock-names:
373 items: 373 items:
374 - const: oscclk 374 - const: oscclk
375 - const: sclk_jpeg_mscl 375 - const: sclk_jpeg_mscl
376 - const: aclk_mscl_400 376 - const: aclk_mscl_400
377 required: 377 required:
378 - clock-names 378 - clock-names
379 - clocks 379 - clocks
380 380
381 - if: 381 - if:
382 properties: 382 properties:
383 compatible: 383 compatible:
384 contains: 384 contains:
385 const: samsung,exynos5433-cmu-mfc 385 const: samsung,exynos5433-cmu-mfc
386 then: 386 then:
387 properties: 387 properties:
388 clocks: 388 clocks:
389 minItems: 2 389 minItems: 2
390 maxItems: 2 390 maxItems: 2
391 clock-names: 391 clock-names:
392 items: 392 items:
393 - const: oscclk 393 - const: oscclk
394 - const: aclk_mfc_400 394 - const: aclk_mfc_400
395 required: 395 required:
396 - clock-names 396 - clock-names
397 - clocks 397 - clocks
398 398
399 - if: 399 - if:
400 properties: 400 properties:
401 compatible: 401 compatible:
402 contains: 402 contains:
403 const: samsung,exynos5433-cmu-hevc 403 const: samsung,exynos5433-cmu-hevc
404 then: 404 then:
405 properties: 405 properties:
406 clocks: 406 clocks:
407 minItems: 2 407 minItems: 2
408 maxItems: 2 408 maxItems: 2
409 clock-names: 409 clock-names:
410 items: 410 items:
411 - const: oscclk 411 - const: oscclk
412 - const: aclk_hevc_400 412 - const: aclk_hevc_400
413 required: 413 required:
414 - clock-names 414 - clock-names
415 - clocks 415 - clocks
416 416
417 - if: 417 - if:
418 properties: 418 properties:
419 compatible: 419 compatible:
420 contains: 420 contains:
421 const: samsung,exynos5433-cmu-isp 421 const: samsung,exynos5433-cmu-isp
422 then: 422 then:
423 properties: 423 properties:
424 clocks: 424 clocks:
425 minItems: 3 425 minItems: 3
426 maxItems: 3 426 maxItems: 3
427 clock-names: 427 clock-names:
428 items: 428 items:
429 - const: oscclk 429 - const: oscclk
430 - const: aclk_isp_dis_400 430 - const: aclk_isp_dis_400
431 - const: aclk_isp_400 431 - const: aclk_isp_400
432 required: 432 required:
433 - clock-names 433 - clock-names
434 - clocks 434 - clocks
435 435
436 - if: 436 - if:
437 properties: 437 properties:
438 compatible: 438 compatible:
439 contains: 439 contains:
440 const: samsung,exynos5433-cmu-cam0 440 const: samsung,exynos5433-cmu-cam0
441 then: 441 then:
442 properties: 442 properties:
443 clocks: 443 clocks:
444 minItems: 4 444 minItems: 4
445 maxItems: 4 445 maxItems: 4
446 clock-names: 446 clock-names:
447 items: 447 items:
448 - const: oscclk 448 - const: oscclk
449 - const: aclk_cam0_333 449 - const: aclk_cam0_333
450 - const: aclk_cam0_400 450 - const: aclk_cam0_400
451 - const: aclk_cam0_552 451 - const: aclk_cam0_552
452 required: 452 required:
453 - clock-names 453 - clock-names
454 - clocks 454 - clocks
455 455
456 - if: 456 - if:
457 properties: 457 properties:
458 compatible: 458 compatible:
459 contains: 459 contains:
460 const: samsung,exynos5433-cmu-cam1 460 const: samsung,exynos5433-cmu-cam1
461 then: 461 then:
462 properties: 462 properties:
463 clocks: 463 clocks:
464 minItems: 7 464 minItems: 7
465 maxItems: 7 465 maxItems: 7
466 clock-names: 466 clock-names:
467 items: 467 items:
468 - const: oscclk 468 - const: oscclk
469 - const: sclk_isp_uart_cam1 469 - const: sclk_isp_uart_cam1
470 - const: sclk_isp_spi1_cam1 470 - const: sclk_isp_spi1_cam1
471 - const: sclk_isp_spi0_cam1 471 - const: sclk_isp_spi0_cam1
472 - const: aclk_cam1_333 472 - const: aclk_cam1_333
473 - const: aclk_cam1_400 473 - const: aclk_cam1_400
474 - const: aclk_cam1_552 474 - const: aclk_cam1_552
475 required: 475 required:
476 - clock-names 476 - clock-names
477 - clocks 477 - clocks
478 478
479 - if: 479 - if:
480 properties: 480 properties:
481 compatible: 481 compatible:
482 contains: 482 contains:
483 const: samsung,exynos5433-cmu-imem 483 const: samsung,exynos5433-cmu-imem
484 then: 484 then:
485 properties: 485 properties:
486 clocks: 486 clocks:
487 minItems: 4 487 minItems: 4
488 maxItems: 4 488 maxItems: 4
489 clock-names: 489 clock-names:
490 items: 490 items:
491 - const: oscclk 491 - const: oscclk
492 - const: aclk_imem_sssx_266 492 - const: aclk_imem_sssx_266
493 - const: aclk_imem_266 493 - const: aclk_imem_266
494 - const: aclk_imem_200 494 - const: aclk_imem_200
495 required: 495 required:
496 - clock-names 496 - clock-names
497 - clocks 497 - clocks
498 498
499 additionalProperties: false 499 additionalProperties: false
500 500
501 examples: 501 examples:
502 - | 502 - |
503 #include <dt-bindings/clock/exynos5433.h> 503 #include <dt-bindings/clock/exynos5433.h>
504 xxti: clock { 504 xxti: clock {
505 compatible = "fixed-clock"; 505 compatible = "fixed-clock";
506 clock-output-names = "oscclk"; 506 clock-output-names = "oscclk";
507 #clock-cells = <0>; 507 #clock-cells = <0>;
508 clock-frequency = <24000000>; 508 clock-frequency = <24000000>;
509 }; 509 };
510 510
511 clock-controller@10030000 { 511 clock-controller@10030000 {
512 compatible = "samsung,exynos5433-cmu-t 512 compatible = "samsung,exynos5433-cmu-top";
513 reg = <0x10030000 0x1000>; 513 reg = <0x10030000 0x1000>;
514 #clock-cells = <1>; 514 #clock-cells = <1>;
515 515
516 clock-names = "oscclk", 516 clock-names = "oscclk",
517 "sclk_mphy_pll", 517 "sclk_mphy_pll",
518 "sclk_mfc_pll", 518 "sclk_mfc_pll",
519 "sclk_bus_pll"; 519 "sclk_bus_pll";
520 clocks = <&xxti>, 520 clocks = <&xxti>,
521 <&cmu_cpif CLK_SCLK_MPHY_PLL> 521 <&cmu_cpif CLK_SCLK_MPHY_PLL>,
522 <&cmu_mif CLK_SCLK_MFC_PLL>, 522 <&cmu_mif CLK_SCLK_MFC_PLL>,
523 <&cmu_mif CLK_SCLK_BUS_PLL>; 523 <&cmu_mif CLK_SCLK_BUS_PLL>;
524 }; 524 };
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