1 # SPDX-License-Identifier: (GPL-2.0-only OR BS !! 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/clock/ti,cd 4 $id: http://devicetree.org/schemas/clock/ti,cdce925.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: TI CDCE913/925/937/949 programmable I2C 7 title: TI CDCE913/925/937/949 programmable I2C clock synthesizers
8 8
9 maintainers: 9 maintainers:
10 - Alexander Stein <alexander.stein@ew.tq-grou 10 - Alexander Stein <alexander.stein@ew.tq-group.com>
11 11
12 description: | 12 description: |
13 Flexible Low Power LVCMOS Clock Generator wi 13 Flexible Low Power LVCMOS Clock Generator with SSC Support for EMI Reduction
14 14
15 - CDCE(L)913: 1-PLL, 3 Outputs https://www.t 15 - CDCE(L)913: 1-PLL, 3 Outputs https://www.ti.com/product/cdce913
16 - CDCE(L)925: 2-PLL, 5 Outputs https://www.t 16 - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925
17 - CDCE(L)937: 3-PLL, 7 Outputs https://www.t 17 - CDCE(L)937: 3-PLL, 7 Outputs https://www.ti.com/product/cdce937
18 - CDCE(L)949: 4-PLL, 9 Outputs https://www.t 18 - CDCE(L)949: 4-PLL, 9 Outputs https://www.ti.com/product/cdce949
19 19
20 properties: 20 properties:
21 compatible: 21 compatible:
22 enum: 22 enum:
23 - ti,cdce913 23 - ti,cdce913
24 - ti,cdce925 24 - ti,cdce925
25 - ti,cdce937 25 - ti,cdce937
26 - ti,cdce949 26 - ti,cdce949
27 27
28 reg: 28 reg:
29 maxItems: 1 29 maxItems: 1
30 30
31 clocks: 31 clocks:
32 items: 32 items:
33 - description: fixed parent clock 33 - description: fixed parent clock
34 34
35 "#clock-cells": 35 "#clock-cells":
36 const: 1 36 const: 1
37 37
38 vdd-supply: 38 vdd-supply:
39 description: Regulator that provides 1.8V 39 description: Regulator that provides 1.8V Vdd power supply
40 40
41 vddout-supply: 41 vddout-supply:
42 description: | 42 description: |
43 Regulator that provides Vddout power sup 43 Regulator that provides Vddout power supply.
44 non-L variant: 2.5V or 3.3V for 44 non-L variant: 2.5V or 3.3V for
45 L variant: 1.8V for 45 L variant: 1.8V for
46 46
47 xtal-load-pf: 47 xtal-load-pf:
48 $ref: /schemas/types.yaml#/definitions/uin 48 $ref: /schemas/types.yaml#/definitions/uint32
49 description: | 49 description: |
50 Crystal load-capacitor value to fine-tun 50 Crystal load-capacitor value to fine-tune performance on a
51 board, or to compensate for external inf 51 board, or to compensate for external influences.
52 52
53 patternProperties: 53 patternProperties:
54 "^PLL[1-4]$": 54 "^PLL[1-4]$":
55 type: object 55 type: object
56 description: | 56 description: |
57 optional child node can be used to speci 57 optional child node can be used to specify spread
58 spectrum clocking parameters for a board 58 spectrum clocking parameters for a board
59 59
60 additionalProperties: false 60 additionalProperties: false
61 61
62 properties: 62 properties:
63 spread-spectrum: 63 spread-spectrum:
64 $ref: /schemas/types.yaml#/definitions 64 $ref: /schemas/types.yaml#/definitions/uint32
65 description: SSC mode as defined in th 65 description: SSC mode as defined in the data sheet
66 66
67 spread-spectrum-center: 67 spread-spectrum-center:
68 type: boolean 68 type: boolean
69 description: | 69 description: |
70 Use "centered" mode instead of "max" 70 Use "centered" mode instead of "max" mode. When
71 present, the clock runs at the reque 71 present, the clock runs at the requested frequency on average.
72 Otherwise the requested frequency is 72 Otherwise the requested frequency is the maximum value of the
73 SCC range. 73 SCC range.
74 74
75 required: 75 required:
76 - compatible 76 - compatible
77 - reg 77 - reg
78 - clocks 78 - clocks
79 - "#clock-cells" 79 - "#clock-cells"
80 80
81 additionalProperties: false 81 additionalProperties: false
82 82
83 examples: 83 examples:
84 - | 84 - |
85 i2c { 85 i2c {
86 #address-cells = <1>; 86 #address-cells = <1>;
87 #size-cells = <0>; 87 #size-cells = <0>;
88 88
89 cdce925: clock-controller@64 { 89 cdce925: clock-controller@64 {
90 compatible = "ti,cdce925"; 90 compatible = "ti,cdce925";
91 reg = <0x64>; 91 reg = <0x64>;
92 clocks = <&xtal_27Mhz>; 92 clocks = <&xtal_27Mhz>;
93 #clock-cells = <1>; 93 #clock-cells = <1>;
94 xtal-load-pf = <5>; 94 xtal-load-pf = <5>;
95 vdd-supply = <®_1v8>; 95 vdd-supply = <®_1v8>;
96 vddout-supply = <®_3v3>; 96 vddout-supply = <®_3v3>;
97 /* PLL options to get SSC 1% cente 97 /* PLL options to get SSC 1% centered */
98 PLL2 { 98 PLL2 {
99 spread-spectrum = <4>; 99 spread-spectrum = <4>;
100 spread-spectrum-center; 100 spread-spectrum-center;
101 }; 101 };
102 }; 102 };
103 }; 103 };
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