1 Binding for Texas Instruments FAPLL clock. 1 Binding for Texas Instruments FAPLL clock.
2 2
3 This binding uses the common clock binding[1]. 3 This binding uses the common clock binding[1]. It assumes a
4 register-mapped FAPLL with usually two selecta 4 register-mapped FAPLL with usually two selectable input clocks
5 (reference clock and bypass clock), and one or 5 (reference clock and bypass clock), and one or more child
6 syntesizers. 6 syntesizers.
7 7
8 [1] Documentation/devicetree/bindings/clock/cl 8 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
9 9
10 Required properties: 10 Required properties:
11 - compatible : shall be "ti,dm816-fapll-clock" 11 - compatible : shall be "ti,dm816-fapll-clock"
12 - #clock-cells : from common clock binding; sh 12 - #clock-cells : from common clock binding; shall be set to 0.
13 - clocks : link phandles of parent clocks (clk 13 - clocks : link phandles of parent clocks (clk-ref and clk-bypass)
14 - reg : address and length of the register set 14 - reg : address and length of the register set for controlling the FAPLL.
15 15
16 Examples: 16 Examples:
17 main_fapll: main_fapll { 17 main_fapll: main_fapll {
18 #clock-cells = <1>; 18 #clock-cells = <1>;
19 compatible = "ti,dm816-fapll-c 19 compatible = "ti,dm816-fapll-clock";
20 reg = <0x400 0x40>; 20 reg = <0x400 0x40>;
21 clocks = <&sys_clkin_ck &sys_c 21 clocks = <&sys_clkin_ck &sys_clkin_ck>;
22 clock-indices = <1>, <2>, <3>, 22 clock-indices = <1>, <2>, <3>, <4>, <5>,
23 <6>, <7>; 23 <6>, <7>;
24 clock-output-names = "main_pll 24 clock-output-names = "main_pll_clk1",
25 "main_pll 25 "main_pll_clk2",
26 "main_pll 26 "main_pll_clk3",
27 "main_pll 27 "main_pll_clk4",
28 "main_pll 28 "main_pll_clk5",
29 "main_pll 29 "main_pll_clk6",
30 "main_pll 30 "main_pll_clk7";
31 }; 31 };
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