1 * Clock bindings for Freescale Vybrid VF610 SO
2
3 Required properties:
4 - compatible: Should be "fsl,vf610-ccm"
5 - reg: Address and length of the register set
6 - #clock-cells: Should be <1>
7
8 Optional properties:
9 - clocks: list of clock identifiers which are
10 given clock controller. Please refer t
11 the input clocks for a given controlle
12 - clock-names: list of names of clocks which a
13 given clock controller.
14
15 Input clocks for top clock controller:
16 - sxosc (external crystal oscillator 3
17 - fxosc (external crystal oscillator 2
18 - audio_ext
19 - enet_ext
20
21 The clock consumer should specify the desired
22 ID in its "clocks" phandle cell. See include/d
23 for the full list of VF610 clock IDs.
24
25 Examples:
26
27 clks: ccm@4006b000 {
28 compatible = "fsl,vf610-ccm";
29 reg = <0x4006b000 0x1000>;
30 #clock-cells = <1>;
31 clocks = <&sxosc>, <&fxosc>;
32 clock-names = "sxosc", "fxosc";
33 };
34
35 uart1: serial@40028000 {
36 compatible = "fsl,vf610-uart";
37 reg = <0x40028000 0x1000>;
38 interrupts = <0 62 0x04>;
39 clocks = <&clks VF610_CLK_UART1>;
40 clock-names = "ipg";
41 };
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