1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/crypto/fsl- 4 $id: http://devicetree.org/schemas/crypto/fsl-dcp.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale DCP (Data Co-Processor) found 7 title: Freescale DCP (Data Co-Processor) found on i.MX23/i.MX28
8 8
9 maintainers: 9 maintainers:
10 - Marek Vasut <marex@denx.de> 10 - Marek Vasut <marex@denx.de>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 oneOf: !! 14 enum:
15 - enum: !! 15 - fsl,imx23-dcp
16 - fsl,imx23-dcp !! 16 - fsl,imx28-dcp
17 - fsl,imx28-dcp <<
18 - items: <<
19 - enum: <<
20 - fsl,imx6sl-dcp <<
21 - fsl,imx6ull-dcp <<
22 - const: fsl,imx28-dcp <<
23 17
24 reg: 18 reg:
25 maxItems: 1 19 maxItems: 1
26 20
27 interrupts: 21 interrupts:
28 description: Should contain MXS DCP interr 22 description: Should contain MXS DCP interrupt numbers, VMI IRQ and DCP IRQ
29 must be supplied, optionally Secure IRQ 23 must be supplied, optionally Secure IRQ can be present, but is currently
30 not implemented and not used. 24 not implemented and not used.
31 items: 25 items:
32 - description: MXS DCP VMI interrupt 26 - description: MXS DCP VMI interrupt
33 - description: MXS DCP DCP interrupt 27 - description: MXS DCP DCP interrupt
34 - description: MXS DCP secure interrupt 28 - description: MXS DCP secure interrupt
35 minItems: 2 29 minItems: 2
>> 30 maxItems: 3
36 31
37 clocks: 32 clocks:
38 maxItems: 1 33 maxItems: 1
39 34
40 clock-names: 35 clock-names:
41 const: dcp 36 const: dcp
42 37
43 required: 38 required:
44 - compatible 39 - compatible
45 - reg 40 - reg
46 - interrupts 41 - interrupts
47 42
48 additionalProperties: false 43 additionalProperties: false
49 44
50 examples: 45 examples:
51 - | 46 - |
52 crypto@80028000 { 47 crypto@80028000 {
53 compatible = "fsl,imx23-dcp"; 48 compatible = "fsl,imx23-dcp";
54 reg = <0x80028000 0x2000>; 49 reg = <0x80028000 0x2000>;
55 interrupts = <53>, <54>; 50 interrupts = <53>, <54>;
56 }; 51 };
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