1 SEC 6 is as Freescale's Cryptographic Accelera 1 SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
2 Currently Freescale powerpc chip C29X is embed 2 Currently Freescale powerpc chip C29X is embedded with SEC 6.
3 SEC 6 device tree binding include: 3 SEC 6 device tree binding include:
4 -SEC 6 Node 4 -SEC 6 Node
5 -Job Ring Node 5 -Job Ring Node
6 -Full Example 6 -Full Example
7 7
8 ============================================== 8 =====================================================================
9 SEC 6 Node 9 SEC 6 Node
10 10
11 Description 11 Description
12 12
13 Node defines the base address of the SEC 6 13 Node defines the base address of the SEC 6 block.
14 This block specifies the address range of 14 This block specifies the address range of all global
15 configuration registers for the SEC 6 bloc 15 configuration registers for the SEC 6 block.
16 For example, In C293, we could see three S 16 For example, In C293, we could see three SEC 6 node.
17 17
18 PROPERTIES 18 PROPERTIES
19 19
20 - compatible 20 - compatible
21 Usage: required 21 Usage: required
22 Value type: <string> 22 Value type: <string>
23 Definition: Must include "fsl,sec-v6.0". 23 Definition: Must include "fsl,sec-v6.0".
24 24
25 - fsl,sec-era 25 - fsl,sec-era
26 Usage: optional 26 Usage: optional
27 Value type: <u32> 27 Value type: <u32>
28 Definition: A standard property. Define 28 Definition: A standard property. Define the 'ERA' of the SEC
29 device. 29 device.
30 30
31 - #address-cells 31 - #address-cells
32 Usage: required 32 Usage: required
33 Value type: <u32> 33 Value type: <u32>
34 Definition: A standard property. Defin 34 Definition: A standard property. Defines the number of cells
35 for representing physical addresses 35 for representing physical addresses in child nodes.
36 36
37 - #size-cells 37 - #size-cells
38 Usage: required 38 Usage: required
39 Value type: <u32> 39 Value type: <u32>
40 Definition: A standard property. Defin 40 Definition: A standard property. Defines the number of cells
41 for representing the size of physic 41 for representing the size of physical addresses in
42 child nodes. 42 child nodes.
43 43
44 - reg 44 - reg
45 Usage: required 45 Usage: required
46 Value type: <prop-encoded-array> 46 Value type: <prop-encoded-array>
47 Definition: A standard property. Specif 47 Definition: A standard property. Specifies the physical
48 address and length of the SEC 6 conf 48 address and length of the SEC 6 configuration registers.
49 49
50 - ranges 50 - ranges
51 Usage: required 51 Usage: required
52 Value type: <prop-encoded-array> 52 Value type: <prop-encoded-array>
53 Definition: A standard property. Speci 53 Definition: A standard property. Specifies the physical address
54 range of the SEC 6.0 register space 54 range of the SEC 6.0 register space (-SNVS not included). A
55 triplet that includes the child add 55 triplet that includes the child address, parent address, &
56 length. 56 length.
57 57
58 Note: All other standard properties (see th !! 58 Note: All other standard properties (see the ePAPR) are allowed
59 are allowed but are optional. !! 59 but are optional.
60 60
61 EXAMPLE 61 EXAMPLE
62 crypto@a0000 { 62 crypto@a0000 {
63 compatible = "fsl,sec-v6.0"; 63 compatible = "fsl,sec-v6.0";
64 fsl,sec-era = <6>; 64 fsl,sec-era = <6>;
65 #address-cells = <1>; 65 #address-cells = <1>;
66 #size-cells = <1>; 66 #size-cells = <1>;
67 reg = <0xa0000 0x20000>; 67 reg = <0xa0000 0x20000>;
68 ranges = <0 0xa0000 0x20000>; 68 ranges = <0 0xa0000 0x20000>;
69 }; 69 };
70 70
71 ============================================== 71 =====================================================================
72 Job Ring (JR) Node 72 Job Ring (JR) Node
73 73
74 Child of the crypto node defines data proc 74 Child of the crypto node defines data processing interface to SEC 6
75 across the peripheral bus for purposes of 75 across the peripheral bus for purposes of processing
76 cryptographic descriptors. The specified a 76 cryptographic descriptors. The specified address
77 range can be made visible to one (or more) 77 range can be made visible to one (or more) cores.
78 The interrupt defined for this node is con 78 The interrupt defined for this node is controlled within
79 the address range of this node. 79 the address range of this node.
80 80
81 - compatible 81 - compatible
82 Usage: required 82 Usage: required
83 Value type: <string> 83 Value type: <string>
84 Definition: Must include "fsl,sec-v6.0-j 84 Definition: Must include "fsl,sec-v6.0-job-ring".
85 85
86 - reg 86 - reg
87 Usage: required 87 Usage: required
88 Value type: <prop-encoded-array> 88 Value type: <prop-encoded-array>
89 Definition: Specifies a two JR parameter 89 Definition: Specifies a two JR parameters: an offset from
90 the parent physical address and the 90 the parent physical address and the length the JR registers.
91 91
92 - interrupts 92 - interrupts
93 Usage: required 93 Usage: required
94 Value type: <prop_encoded-array> 94 Value type: <prop_encoded-array>
95 Definition: Specifies the interrupts ge 95 Definition: Specifies the interrupts generated by this
96 device. The value of the interrupt 96 device. The value of the interrupts property
97 consists of one interrupt specifier 97 consists of one interrupt specifier. The format
98 of the specifier is defined by the 98 of the specifier is defined by the binding document
99 describing the node's interrupt par 99 describing the node's interrupt parent.
100 100
101 EXAMPLE 101 EXAMPLE
102 jr@1000 { 102 jr@1000 {
103 compatible = "fsl,sec-v6.0-job 103 compatible = "fsl,sec-v6.0-job-ring";
104 reg = <0x1000 0x1000>; 104 reg = <0x1000 0x1000>;
105 interrupts = <49 2 0 0>; 105 interrupts = <49 2 0 0>;
106 }; 106 };
107 107
108 ============================================== 108 ===================================================================
109 Full Example 109 Full Example
110 110
111 Since some chips may contain more than one SEC 111 Since some chips may contain more than one SEC, the dtsi contains
112 only the node contents, not the node itself. 112 only the node contents, not the node itself. A chip using the SEC
113 should include the dtsi inside each SEC node. 113 should include the dtsi inside each SEC node. Example:
114 114
115 In qoriq-sec6.0.dtsi: 115 In qoriq-sec6.0.dtsi:
116 116
117 compatible = "fsl,sec-v6.0"; 117 compatible = "fsl,sec-v6.0";
118 fsl,sec-era = <6>; 118 fsl,sec-era = <6>;
119 #address-cells = <1>; 119 #address-cells = <1>;
120 #size-cells = <1>; 120 #size-cells = <1>;
121 121
122 jr@1000 { 122 jr@1000 {
123 compatible = "fsl,sec-v6.0-job 123 compatible = "fsl,sec-v6.0-job-ring",
124 "fsl,sec-v5.2-job 124 "fsl,sec-v5.2-job-ring",
125 "fsl,sec-v5.0-job 125 "fsl,sec-v5.0-job-ring",
126 "fsl,sec-v4.4-job 126 "fsl,sec-v4.4-job-ring",
127 "fsl,sec-v4.0-job 127 "fsl,sec-v4.0-job-ring";
128 reg = <0x1000 0x1000>; 128 reg = <0x1000 0x1000>;
129 }; 129 };
130 130
131 jr@2000 { 131 jr@2000 {
132 compatible = "fsl,sec-v6.0-job 132 compatible = "fsl,sec-v6.0-job-ring",
133 "fsl,sec-v5.2-job 133 "fsl,sec-v5.2-job-ring",
134 "fsl,sec-v5.0-job 134 "fsl,sec-v5.0-job-ring",
135 "fsl,sec-v4.4-job 135 "fsl,sec-v4.4-job-ring",
136 "fsl,sec-v4.0-job 136 "fsl,sec-v4.0-job-ring";
137 reg = <0x2000 0x1000>; 137 reg = <0x2000 0x1000>;
138 }; 138 };
139 139
140 In the C293 device tree, we add the include of 140 In the C293 device tree, we add the include of public property:
141 141
142 crypto@a0000 { 142 crypto@a0000 {
143 /include/ "qoriq-sec6.0.dtsi" 143 /include/ "qoriq-sec6.0.dtsi"
144 } 144 }
145 145
146 crypto@a0000 { 146 crypto@a0000 {
147 reg = <0xa0000 0x20000>; 147 reg = <0xa0000 0x20000>;
148 ranges = <0 0xa0000 0x20000>; 148 ranges = <0 0xa0000 0x20000>;
149 149
150 jr@1000 { 150 jr@1000 {
151 interrupts = <49 2 0 0 151 interrupts = <49 2 0 0>;
152 }; 152 };
153 153
154 jr@2000 { 154 jr@2000 {
155 interrupts = <50 2 0 0 155 interrupts = <50 2 0 0>;
156 }; 156 };
157 }; 157 };
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