1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/crypto/inte 4 $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Intel Keem Bay OCS AES !! 7 title: Intel Keem Bay OCS AES Device Tree Bindings
8 8
9 maintainers: 9 maintainers:
10 - Daniele Alessandrelli <daniele.alessandrell 10 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
11 11
12 description: 12 description:
13 The Intel Keem Bay Offload and Crypto Subsys 13 The Intel Keem Bay Offload and Crypto Subsystem (OCS) AES engine provides
14 hardware-accelerated AES/SM4 encryption/decr 14 hardware-accelerated AES/SM4 encryption/decryption.
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 const: intel,keembay-ocs-aes 18 const: intel,keembay-ocs-aes
19 19
20 reg: 20 reg:
21 maxItems: 1 21 maxItems: 1
22 22
23 interrupts: 23 interrupts:
24 maxItems: 1 24 maxItems: 1
25 25
26 clocks: 26 clocks:
27 maxItems: 1 27 maxItems: 1
28 28
29 required: 29 required:
30 - compatible 30 - compatible
31 - reg 31 - reg
32 - interrupts 32 - interrupts
33 - clocks 33 - clocks
34 34
35 additionalProperties: false 35 additionalProperties: false
36 36
37 examples: 37 examples:
38 - | 38 - |
39 #include <dt-bindings/interrupt-controller 39 #include <dt-bindings/interrupt-controller/arm-gic.h>
40 crypto@30008000 { 40 crypto@30008000 {
41 compatible = "intel,keembay-ocs-aes"; 41 compatible = "intel,keembay-ocs-aes";
42 reg = <0x30008000 0x1000>; 42 reg = <0x30008000 0x1000>;
43 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL 43 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
44 clocks = <&scmi_clk 95>; 44 clocks = <&scmi_clk 95>;
45 }; 45 };
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