1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/bri 4 $id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale i.MX8MP DPI to LVDS bridge ch 7 title: Freescale i.MX8MP DPI to LVDS bridge chip
8 8
9 maintainers: 9 maintainers:
10 - Marek Vasut <marex@denx.de> 10 - Marek Vasut <marex@denx.de>
11 11
12 description: | 12 description: |
13 The i.MX8MP mediamix contains two registers 13 The i.MX8MP mediamix contains two registers which are responsible
14 for configuring the on-SoC DPI-to-LVDS seria 14 for configuring the on-SoC DPI-to-LVDS serializer. This describes
15 those registers as bridge within the DT. 15 those registers as bridge within the DT.
16 16
17 properties: 17 properties:
18 compatible: 18 compatible:
19 enum: 19 enum:
20 - fsl,imx6sx-ldb 20 - fsl,imx6sx-ldb
21 - fsl,imx8mp-ldb 21 - fsl,imx8mp-ldb
22 - fsl,imx93-ldb 22 - fsl,imx93-ldb
23 23
24 clocks: 24 clocks:
25 maxItems: 1 25 maxItems: 1
26 26
27 clock-names: 27 clock-names:
28 const: ldb 28 const: ldb
29 29
30 reg: 30 reg:
31 maxItems: 2 31 maxItems: 2
32 32
33 reg-names: 33 reg-names:
34 items: 34 items:
35 - const: ldb 35 - const: ldb
36 - const: lvds 36 - const: lvds
37 37
38 ports: 38 ports:
39 $ref: /schemas/graph.yaml#/properties/port 39 $ref: /schemas/graph.yaml#/properties/ports
40 40
41 properties: 41 properties:
42 port@0: 42 port@0:
43 $ref: /schemas/graph.yaml#/properties/ 43 $ref: /schemas/graph.yaml#/properties/port
44 description: Video port for DPI input. 44 description: Video port for DPI input.
45 45
46 port@1: 46 port@1:
47 $ref: /schemas/graph.yaml#/properties/ 47 $ref: /schemas/graph.yaml#/properties/port
48 description: Video port for LVDS Chann 48 description: Video port for LVDS Channel-A output (panel or bridge).
49 49
50 port@2: 50 port@2:
51 $ref: /schemas/graph.yaml#/properties/ 51 $ref: /schemas/graph.yaml#/properties/port
52 description: Video port for LVDS Chann 52 description: Video port for LVDS Channel-B output (panel or bridge).
53 53
54 required: 54 required:
55 - port@0 55 - port@0
56 - port@1 56 - port@1
57 57
58 required: 58 required:
59 - compatible 59 - compatible
60 - clocks 60 - clocks
61 - ports 61 - ports
62 62
63 allOf: 63 allOf:
64 - if: 64 - if:
65 properties: 65 properties:
66 compatible: 66 compatible:
67 contains: 67 contains:
68 enum: 68 enum:
69 - fsl,imx6sx-ldb 69 - fsl,imx6sx-ldb
70 - fsl,imx93-ldb 70 - fsl,imx93-ldb
71 then: 71 then:
72 properties: 72 properties:
73 ports: 73 ports:
74 properties: 74 properties:
75 port@2: false 75 port@2: false
76 76
77 additionalProperties: false 77 additionalProperties: false
78 78
79 examples: 79 examples:
80 - | 80 - |
81 #include <dt-bindings/clock/imx8mp-clock.h 81 #include <dt-bindings/clock/imx8mp-clock.h>
82 82
83 blk-ctrl { 83 blk-ctrl {
84 #address-cells = <1>; 84 #address-cells = <1>;
85 #size-cells = <1>; 85 #size-cells = <1>;
86 86
87 bridge@5c { 87 bridge@5c {
88 compatible = "fsl,imx8mp-ldb"; 88 compatible = "fsl,imx8mp-ldb";
89 clocks = <&clk IMX8MP_CLK_MEDIA_LD 89 clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
90 clock-names = "ldb"; 90 clock-names = "ldb";
91 reg = <0x5c 0x4>, <0x128 0x4>; 91 reg = <0x5c 0x4>, <0x128 0x4>;
92 reg-names = "ldb", "lvds"; 92 reg-names = "ldb", "lvds";
93 93
94 ports { 94 ports {
95 #address-cells = <1>; 95 #address-cells = <1>;
96 #size-cells = <0>; 96 #size-cells = <0>;
97 97
98 port@0 { 98 port@0 {
99 reg = <0>; 99 reg = <0>;
100 100
101 ldb_from_lcdif2: endpoint 101 ldb_from_lcdif2: endpoint {
102 remote-endpoint = <&lc 102 remote-endpoint = <&lcdif2_to_ldb>;
103 }; 103 };
104 }; 104 };
105 105
106 port@1 { 106 port@1 {
107 reg = <1>; 107 reg = <1>;
108 108
109 ldb_lvds_ch0: endpoint { 109 ldb_lvds_ch0: endpoint {
110 remote-endpoint = <&ld 110 remote-endpoint = <&ldb_to_lvdsx4panel>;
111 }; 111 };
112 }; 112 };
113 113
114 port@2 { 114 port@2 {
115 reg = <2>; 115 reg = <2>;
116 116
117 ldb_lvds_ch1: endpoint { 117 ldb_lvds_ch1: endpoint {
118 }; 118 };
119 }; 119 };
120 }; 120 };
121 }; 121 };
122 }; 122 };
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