1 Device Tree bindings for Freescale DCU DRM Dri 1 Device Tree bindings for Freescale DCU DRM Driver
2 2
3 Required properties: 3 Required properties:
4 - compatible: Should be one of 4 - compatible: Should be one of
5 * "fsl,ls1021a-dcu". 5 * "fsl,ls1021a-dcu".
6 * "fsl,vf610-dcu". 6 * "fsl,vf610-dcu".
7 7
8 - reg: Address and length of 8 - reg: Address and length of the register set for dcu.
9 - clocks: Handle to "dcu" and "p 9 - clocks: Handle to "dcu" and "pix" clock (in the order below)
10 This can be the same c 10 This can be the same clock (e.g. LS1021a)
11 See ../clocks/clock-bi 11 See ../clocks/clock-bindings.txt for details.
12 - clock-names: Should be "dcu" and "p 12 - clock-names: Should be "dcu" and "pix"
13 See ../clocks/clock-bi 13 See ../clocks/clock-bindings.txt for details.
14 - big-endian Boolean property, LS10 14 - big-endian Boolean property, LS1021A DCU registers are big-endian.
15 - port Video port for the pan 15 - port Video port for the panel output
16 16
17 Optional properties: 17 Optional properties:
18 - fsl,tcon: The phandle to the tim 18 - fsl,tcon: The phandle to the timing controller node.
19 19
20 Examples: 20 Examples:
21 dcu: dcu@2ce0000 { 21 dcu: dcu@2ce0000 {
22 compatible = "fsl,ls1021a-dcu"; 22 compatible = "fsl,ls1021a-dcu";
23 reg = <0x0 0x2ce0000 0x0 0x10000>; 23 reg = <0x0 0x2ce0000 0x0 0x10000>;
24 clocks = <&platform_clk 0>, <&platform 24 clocks = <&platform_clk 0>, <&platform_clk 0>;
25 clock-names = "dcu", "pix"; 25 clock-names = "dcu", "pix";
26 big-endian; 26 big-endian;
27 fsl,tcon = <&tcon>; 27 fsl,tcon = <&tcon>;
28 28
29 port { 29 port {
30 dcu_out: endpoint { 30 dcu_out: endpoint {
31 remote-endpoint = <&pa 31 remote-endpoint = <&panel_out>;
32 }; 32 };
33 }; 33 };
34 }; 34 };
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